C8051F989-GUR Silicon Labs, C8051F989-GUR Datasheet - Page 212

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C8051F989-GUR

Manufacturer Part Number
C8051F989-GUR
Description
8-bit Microcontrollers - MCU 4kB 512B RAM
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F989-GUR

Rohs
yes
Core
8051
Data Bus Width
8 bit
Processor Series
C8051
C8051F99x-C8051F98x
Internal Register Definition 20.7. CAPTUREn: SmaRTClock Timer Capture
SmaRTClock Addresses: CAPTURE0 = 0x00; CAPTURE1 = 0x01; CAPTURE2 =0x02; CAPTURE3: 0x03.
Internal Register Definition 20.8. ALARMn: SmaRTClock Alarm Programmed Value
SmaRTClock Addresses: ALARM0 = 0x08; ALARM1 = 0x09; ALARM2 = 0x0A; ALARM3 = 0x0B
212
Note: The least significant bit of the timer capture value is in CAPTURE0.0.
Note: The least significant bit of the alarm programmed value is in ALARM0.0.
Name
Reset
Name
Reset
Type
Bit
7:0
Type
Bit
7:0
Bit
Bit
CAPTURE[31:0] SmaRTClock Timer Capture.
ALARM[31:0] SmaRTClock Alarm Programmed Value.
Name
R/W
R/W
Name
7
0
7
0
These 4 registers (ALARM3–ALARM0) are used to set an alarm event for the
SmaRTClock timer. The SmaRTClock alarm should be disabled (RTC0AEN=0)
when updating these registers.
R/W
R/W
These 4 registers (CAPTURE3–CAPTURE0) are used to read or set the 32-bit
SmaRTClock timer. Data is transferred to or from the SmaRTClock timer when
the RTC0SET or RTC0CAP bits are set.
6
0
6
0
R/W
R/W
5
0
5
0
CAPTURE[31:0]
R/W
R/W
Rev. 1.1
4
0
4
ALARM[31:0]
0
Function
Function
R/W
R/W
3
0
3
0
R/W
R/W
2
0
2
0
R/W
R/W
1
0
1
0
R/W
R/W
0
0
0
0

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