C8051F989-GUR Silicon Labs, C8051F989-GUR Datasheet - Page 222

no-image

C8051F989-GUR

Manufacturer Part Number
C8051F989-GUR
Description
8-bit Microcontrollers - MCU 4kB 512B RAM
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F989-GUR

Rohs
yes
Core
8051
Data Bus Width
8 bit
Processor Series
C8051
C8051F99x-C8051F98x
SFR Definition 21.3. XBR2: Port I/O Crossbar Register 2
SFR Page = 0x0; SFR Address = 0xE3
222
Note: The Crossbar must be enabled (XBARE = 1) to use any Port pin as a digital output.
Name
Reset
Type
5:0
Bit
Bit
7
6
WEAKPUD
WEAKPUD Port I/O Weak Pullup Disable.
Unused
XBARE
Name
R/W
7
0
0: Weak Pullups enabled (except for Port I/O pins configured for analog mode).
Crossbar Enable.
0: Crossbar disabled.
1: Crossbar enabled.
Read = 000000b; Write = Don’t Care.
XBARE
R/W
6
0
R/W
5
0
Rev. 1.1
R/W
4
0
Function
R/W
3
0
R/W
2
0
R/W
1
0
R/W
0
0

Related parts for C8051F989-GUR