C8051F330DR Silicon Labs, C8051F330DR Datasheet - Page 5
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C8051F330DR
Manufacturer Part Number
C8051F330DR
Description
8-bit Microcontrollers - MCU 8kB 10ADC
Manufacturer
Silicon Labs
Datasheet
1.C8051F330DR.pdf
(210 pages)
Specifications of C8051F330DR
Product Category
8-bit Microcontrollers - MCU
Core
8051
Data Bus Width
8 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
8 KB
Data Ram Size
768 B
On-chip Adc
No
Operating Supply Voltage
2.7 V to 3.6 V
Package / Case
QFN-20
Mounting Style
SMD/SMT
Data Rom Size
128 B
Interface Type
I2C, SPI, UART
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
17
Number Of Timers
4
On-chip Dac
No
Processor Series
C8051
Program Memory Type
Flash
Factory Pack Quantity
1500
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.7 V
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15. SMBus ................................................................................................................... 135
16. UART0.................................................................................................................... 153
17. Enhanced Serial Peripheral Interface (SPI0)...................................................... 163
18. Timers.................................................................................................................... 177
14.3.General Purpose Port I/O ............................................................................... 129
15.1.Supporting Documents ................................................................................... 136
15.2.SMBus Configuration...................................................................................... 136
15.3.SMBus Operation ........................................................................................... 136
15.4.Using the SMBus............................................................................................ 138
15.5.SMBus Transfer Modes.................................................................................. 146
15.6.SMBus Status Decoding................................................................................. 150
16.1.Enhanced Baud Rate Generation................................................................... 154
16.2.Operational Modes ......................................................................................... 155
16.3.Multiprocessor Communications .................................................................... 156
17.1.Signal Descriptions......................................................................................... 164
17.2.SPI0 Master Mode Operation ......................................................................... 165
17.3.SPI0 Slave Mode Operation ........................................................................... 167
17.4.SPI0 Interrupt Sources ................................................................................... 167
17.5.Serial Clock Timing......................................................................................... 168
17.6.SPI Special Function Registers ...................................................................... 169
18.1.Timer 0 and Timer 1 ....................................................................................... 177
18.2.Timer 2 .......................................................................................................... 185
15.3.1.Arbitration............................................................................................... 137
15.3.2.Clock Low Extension.............................................................................. 138
15.3.3.SCL Low Timeout................................................................................... 138
15.3.4.SCL High (SMBus Free) Timeout .......................................................... 138
15.4.1.SMBus Configuration Register............................................................... 140
15.4.2.SMB0CN Control Register ..................................................................... 143
15.4.3.Data Register ......................................................................................... 146
15.5.1.Master Transmitter Mode ....................................................................... 146
15.5.2.Master Receiver Mode ........................................................................... 148
15.5.3.Slave Receiver Mode ............................................................................. 149
15.5.4.Slave Transmitter Mode ......................................................................... 150
16.2.1.8-Bit UART ............................................................................................. 155
16.2.2.9-Bit UART ............................................................................................. 156
17.1.1.Master Out, Slave In (MOSI).................................................................. 164
17.1.2.Master In, Slave Out (MISO).................................................................. 164
17.1.3.Serial Clock (SCK) ................................................................................. 164
17.1.4.Slave Select (NSS) ................................................................................ 164
18.1.1.Mode 0: 13-bit Counter/Timer ................................................................ 177
18.1.2.Mode 1: 16-bit Counter/Timer ................................................................ 178
18.1.3.Mode 2: 8-bit Counter/Timer with Auto-Reload...................................... 179
18.1.4.Mode 3: Two 8-bit Counter/Timers (Timer 0 Only)................................. 180
18.2.1.16-bit Timer with Auto-Reload................................................................ 185
Rev. 1.7
C8051F330/1/2/3/4/5
5
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