ADP1048DC1-EVALZ Analog Devices, ADP1048DC1-EVALZ Datasheet - Page 71

• Manufacturer Part Number: ADP1048DC1-EVALZ
• Description: Daughter Cards & OEM Boards ADP1048 DAUGHTERCARD
• Manufacturer: Analog Devices
• Series: ADP1048r

Specifications of ADP1048DC1-EVALZ

• Rohs: yes
• Product: Daughter Cards
• Description/function: 100 kHz daughter board
• Dimensions: 40 mm x 25 mm
• Interface Type: I2C
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3.3 V
• Factory Pack Quantity: 1
• For Use With: ADP1048

Data Sheet
INRUSH SET REGISTER
Table 107. Register 0xFE2E—Inrush Set
Bits
[7:5]
[4:3]
[2:0]
FAST_OVP_FAULT_RISE REGISTER
Table 108. Register 0xFE2F—FAST_OVP_FAULT_RISE
Bits
7
[6:0]
FAST_OVP_FAULT_FALL REGISTER
Table 109. Register 0xFE30—FAST_OVP_FAULT_FALL
Bits
7
[6:0]
FAST OVP DEBOUNCE TIME SETTING REGISTER
Table 110. Register 0xFE31—Fast OVP Debounce Time Setting
Bits
[7:2]
[1:0]
Bit Name
RSVD
Fast OVP rise threshold
Bit Name
RSVD
Fast OVP fall threshold
Bit Name
RSVD
OVP debounce time
Bit Name
RSVD
Timer
Inrush delay time
R/W
R
R/W
R/W
R/W
R
R/W
R/W
R
R/W
R/W
R
R/W
Description
These bits set the timer for the VIN_LOW flag measurement.
Bit 4
0
0
1
1
Bit 2
0
0
0
0
1
1
1
1
Description
Reserved.
These bits set the rising threshold for the analog comparator at the OVP pin input as follows:
OVP threshold = (Code × 0.492/128) + 1.
This threshold is programmable from 1 V to 1.5 V. Each LSB increments the threshold by 3.844 mV.
A value of 0x00 corresponds to a 1 V threshold; a value of 0x3F corresponds to a 1.492 V threshold.
Description
Reserved.
These bits set the falling threshold for the analog comparator at the OVP pin input as follows:
OVP threshold = (Code × 0.492/128) + 1.
This threshold is programmable from 1 V to 1.5 V. Each LSB increments the threshold by 3.844 mV.
A value of 0x00 corresponds to a 1 V threshold; a value of 0x3F corresponds to a 1.492 V threshold.
Description
Reserved.
These bits set the fast OVP debounce time.
Bit 1
0
0
1
1
Reserved.
These bits set the inrush signal delay time after the BROWN_OUT flag goes low.
Bit 1
0
0
1
1
0
0
1
1
Bit 0
0
1
0
1
Bit 3
0
1
0
1
Rev. 0 | Page 71 of 84
Time
120 ns
240 ns
480 ns
640 ns
Bit 0
0
1
0
1
0
1
0
1
Timer
Quarter line cycle
Half line cycle
2 ms
4 ms
Number of Full AC Line Cycles
0
1
2
3
4
5
6
7
ADP1047/ADP1048