ADP1048DC1-EVALZ Analog Devices, ADP1048DC1-EVALZ Datasheet - Page 78

• Manufacturer Part Number: ADP1048DC1-EVALZ
• Description: Daughter Cards & OEM Boards ADP1048 DAUGHTERCARD
• Manufacturer: Analog Devices
• Series: ADP1048r

Specifications of ADP1048DC1-EVALZ

• Rohs: yes
• Product: Daughter Cards
• Description/function: 100 kHz daughter board
• Dimensions: 40 mm x 25 mm
• Interface Type: I2C
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3.3 V
• Factory Pack Quantity: 1
• For Use With: ADP1048

ADP1047/ADP1048
VAC ADC OFFSET TRIM REGISTER
This register must be unlocked for write access; see Table 61.
Table 143. Register 0xFE53—VAC ADC Offset Trim
Bits
[7:0]
CS ADC OFFSET TRIM FOR 500 mV RANGE REGISTER
This register must be unlocked for write access; see Table 61.
Table 144. Register 0xFE54—CS ADC Offset Trim for 500 mV Range
Bits
[7:0]
CS ADC GAIN TRIM FOR HIGH (750 mV) RANGE REGISTER
This register must be unlocked for write access; see Table 61.
Table 145. Register 0xFE7E—CS ADC Gain Trim for High (750 mV) Range
Bits
7
[6:0]
CS ADC OFFSET TRIM FOR HIGH (750 mV) RANGE REGISTER
This register must be unlocked for write access; see Table 61.
Table 146. Register 0xFE7F—CS ADC Offset Trim for High (750 mV) Range
Bits
[7:0]
LATCHED FLAG REGISTERS
The bits in the latched flag registers remain set (latched) to allow users to detect an intermittent fault. Reading a latched flag register resets
the flags in that register.
Table 147. Register 0xFE80—Latched Flag 0
Bits
7
6
5
4
3
2
1
0
Bit Name
VAC ADC offset trim
Bit Name
CS ADC offset trim
Bit Name
Gain polarity
CS ADC gain trim
Bit Name
CS ADC offset trim
Bit Name
MAX_MODULATION
MIN_MODULATION
OLP
FAST_OVP
AC_PERIOD
BROWN_OUT
SOFT_START
INRUSH
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
R
R
R
Description
This register calibrates the VAC ADC offset (the offset is always subtracted from the ADC output).
Description
This register calibrates the CS current sense offset (the offset is always subtracted from the ADC
output).
Description
1 = negative gain is introduced.
0 = positive gain is introduced.
This register calibrates the CS current sense gain.
Description
This register calibrates the CS current sense offset (the offset is always subtracted from the ADC
output).
Description
1 = maximum modulation limit is reached.
1 = minimum modulation limit is reached.
1 = one of the two voltage dividers is probably disconnected or malfunctioning.
1 = the threshold set for the comparator on the OVP pin has been crossed.
1 = controller is not able to detect the ac line period; the maximum value of the period is used
and this flag is set.
1 = VAC is lower than the value stored in VIN_ON (Register 0x35).
1 = system is in soft start sequence; fast loop filter is in use.
1 = INRUSH control relay is off.
Rev. 0 | Page 78 of 84
Data Sheet