AD9683-170EBZ Analog Devices, AD9683-170EBZ Datasheet - Page 29

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AD9683-170EBZ

Manufacturer Part Number
AD9683-170EBZ
Description
Data Conversion IC Development Tools
Manufacturer
Analog Devices
Type
ADCr
Series
AD9683r
Datasheet

Specifications of AD9683-170EBZ

Rohs
yes
Product
Evaluation Boards
Tool Is For Evaluation Of
AD9683-170
Interface Type
SPI
Operating Supply Voltage
1.8 V
Description/function
Evaluation board with AD9683-170
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Current
135 mA
For Use With
AD9683-170
Data Sheet
ADC OVERRANGE AND GAIN CONTROL
In receiver applications, it is desirable to have a mechanism to
reliably determine when the converter is about to be clipped.
The standard overflow indicator provides delayed information on
the state of the analog input that is of limited value in preventing
clipping. Therefore, it is helpful to have a programmable threshold
below full scale that allows time to reduce the gain before the
clip occurs. In addition, because input signals can have significant
slew rates, latency of this function is of concern.
Using the SPI port, the user can provide a threshold above which
the FD output is active. Bit 0 of Address 0x45 enables the fast
detect feature. Address 0x47 to Address 0x4A allow the user to
set the threshold levels. As long as the signal is below the selected
threshold, the FD output remains low. In this mode, the magnitude
of the data is considered in the calculation of the condition, but
the sign of the data is not considered. The threshold detection
responds identically to positive and negative signals outside the
desired range (magnitude).
–100
–200
–300
–400
–100
–200
–300
–400
400
300
200
100
400
300
200
100
–250
0
0
–200
EYE: ALL BITS OFFSET: 0
ULS: 7000; 993329 TOTAL: 7000; 993329
EYE: ALL BITS OFFSET: 0.0018
ULS: 8000; 673330 TOTAL: 8000; 673330
–150
HEIGHT1: EYE DIAGRAM
HEIGHT1: EYE DIAGRAM
–100
Figure 65.
Figure 64.
–50
TIME (ps)
TIME (ps)
0 50
0
AD9683
AD9683
100
150
Digital Outputs Data Eye, Histogram and Bathtub, External 100 Ω Terminations at 3.4 Gbps
Digital Outputs Data Eye, Histogram and Bathtub, External 100 Ω Terminations at 5 Gbps
200
250
1
1
7000
6000
5000
4000
3000
2000
1000
7000
6000
5000
4000
3000
2000
1000
0
0
–10
–10
PERIOD1: HISTOGR AM
PERIOD1: HISTOGR AM
Rev. 0 | Page 29 of 44
TIME (ps)
TIME (ps)
0
0
ADC Overrange (OR)
The ADC overrange indicator is asserted when an overrange is
detected on the input of the ADC. The overrange condition is
determined at the output of the ADC pipeline and, therefore, is
subject to a latency of 36 ADC clock cycles. An overrange at the
input is indicated by this bit 36 clock cycles after it occurs.
Gain Switching
The
either where large dynamic ranges exist or where gain ranging
amplifiers are employed. This circuitry allows digital thresholds
to be set such that an upper threshold and a lower threshold can
be programmed.
One such use is to detect when an ADC is about to reach full
scale with a particular input condition. The result is to provide
an indicator that can be used to quickly insert an attenuator that
prevents ADC overdrive.
10
10
AD9683
2
2
includes circuitry that is useful in applications
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
–10
–12
–14
–16
–10
–12
–14
–16
–2
–4
–6
–8
–2
–4
–6
–8
–0.5
–0.5
1
1
T
T
J
J
AT BER1: BATHTUB
AT BER1: BATHTUB
ULS
ULS
0
0
0.5
0.5
3
3
AD9683

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