IDT70824L35PF IDT, Integrated Device Technology Inc, IDT70824L35PF Datasheet - Page 17

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IDT70824L35PF

Manufacturer Part Number
IDT70824L35PF
Description
IC SARAM 64KBIT 35NS 80TQFP
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT70824L35PF

Format - Memory
RAM
Memory Type
SARAM
Memory Size
64K (4K x 16)
Speed
35ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
80-TQFP, 80-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
70824L35PF

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Waveform of Write Cycles: Sequential Port
Waveform of Burst Write Cycles: Sequential Port
NOTES:
1. If SLD = V
2. If CNTEN = V
3. Pointer is not incrementing on cycle immediately following SLD even if CNTEN is LOW.
4. If SR/W = V
5. SOE = V
SI/O
CNTEN
SI/O
CNTEN
IDT70824S/L
High-Speed 4K x 16 Sequential Access Random Access Memory
SI/O
SCLK
SR/W
SI/O
SCLK
SR/W
SCE
SOE
SLD
SOE
SCE
SLD
OUT
OUT
IN
IN
IL
IL
makes no difference at this point since the SR/W = V
, then address will be clocked in on the SCLK's rising edge.
IL
, data would be written to D
IH
t
t
WS
t
t
WS
Dx
WS
for the SCLK's rising edge, the internal address counter will not advance.
WS
Dx
t
t
t
WH
WH
t
WH
WH
t
CH
t
CH
HIGH IMPEDANCE
t
CYC
t
CYC
t
t
ES
ES
t
CL
t
t
CL
DS
A0
t
DS
A0
0
again since CNTEN = V
t
t
EH
DH
t
t
(1)
(1)
EH
DH
t
t
t
DS
D0
WS
WS
t
t
t
DS
WS
WS
IL
D0
disables the output until SR/W = V
IH
(3)
t
t
WH
WH
(3)
t
.
t
WH
WH
6.42
t
DH
t
17
DH
(5)
t
(4)
ES
t
ES
D1
t
HIGH IMPEDANCE
EH
t
t
EH
CD
t
CKLZ
IH
Military and Commercial Temperature Ranges
is clocked in on the next rising clock edge.
D0
D2
t
CKHZ
(5)
t
OHZ
t
DS
t
D1
ES
HIGH IMPEDANCE
t
EH
(2)
(5)
t
DH
t
3099 drw 20
CD
t
3099 drw 21
CKLZ
(4)
D2

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