UPD44164362AF5-E33-EQ2 Renesas Electronics America, UPD44164362AF5-E33-EQ2 Datasheet - Page 14

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UPD44164362AF5-E33-EQ2

Manufacturer Part Number
UPD44164362AF5-E33-EQ2
Description
SRAM DDRII 18MBIT CIO 165-PBGA
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD44164362AF5-E33-EQ2

Format - Memory
RAM
Memory Type
SRAM - Synchronous, DDR II
Memory Size
18M (512K x 36)
Speed
300MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.9 V
Operating Temperature
0°C ~ 70°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Byte Write Operation
[
Remarks 1. H : HIGH, L : LOW, → : rising edge.
[
Remarks 1. H : HIGH, L : LOW, → : rising edge.
[
Remarks 1. H : HIGH, L : LOW, → : rising edge.
14
μ
μ
μ
Write DQ0 to DQ7
Write DQ0 to DQ3
Write DQ4 to DQ7
Write nothing
Write DQ0 to DQ8
Write nothing
Write DQ0 to DQ17
Write DQ0 to DQ8
Write DQ9 to DQ17
Write nothing
PD44164082A-A]
PD44164092A-A]
PD44164182A-A]
Operation
Operation
Operation
2. Assumes a WRITE cycle was initiated. NW0# and NW1# can be altered for any portion of the BURST
2. Assumes a WRITE cycle was initiated. BW0# can be altered for any portion of the BURST WRITE
2. Assumes a WRITE cycle was initiated. BW0# and BW1# can be altered for any portion of the BURST
WRITE operation provided that the setup and hold requirements are satisfied.
operation provided that the setup and hold requirements are satisfied.
WRITE operation provided that the setup and hold requirements are satisfied.
μ
PD44164082A-A, 44164092A-A, 44164182A-A, 44164362A-A
L → H
L → H
L → H
L → H
L → H
L → H
L → H
L → H
L → H
L → H
K
K
K
Data Sheet M19866EJ1V0DS
L → H
L → H
L → H
L → H
L → H
L → H
L → H
L → H
L → H
L → H
K#
K#
K#
NW0#
BW0#
BW0#
0
0
0
0
1
1
1
1
0
0
1
1
0
0
0
0
1
1
1
1
NW1#
BW1#
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1

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