UPD44164362AF5-E33-EQ2 Renesas Electronics America, UPD44164362AF5-E33-EQ2 Datasheet - Page 31

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UPD44164362AF5-E33-EQ2

Manufacturer Part Number
UPD44164362AF5-E33-EQ2
Description
SRAM DDRII 18MBIT CIO 165-PBGA
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD44164362AF5-E33-EQ2

Format - Memory
RAM
Memory Type
SRAM - Synchronous, DDR II
Memory Size
18M (512K x 36)
Speed
300MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.9 V
Operating Temperature
0°C ~ 70°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Boundary Scan Register Status of Output Pins CQ, CQ# and DQ
Remark
EXTEST
IDCODE
SAMPLE-Z
SAMPLE
BYPASS
Instructions
The Boundary Scan Register statuses during execution each
instruction vary according to the instruction code and SRAM
operation mode.
There are two statuses:
Pad
Internal : Contents of the SRAM internal output “SRAM
: Contents of the output pin (QDR Pad) are captured
in the “CAPTURE Register” in the Boundary Scan
Register.
Output” are captured in the “CAPTURE Register”
in the Boundary Scan Register.
μ
PD44164082A-A, 44164092A-A, 44164182A-A, 44164362A-A
READ (Low-Z)
READ (Low-Z)
READ (Low-Z)
READ (Low-Z)
READ (Low-Z)
NOP (High-Z)
NOP (High-Z)
NOP (High-Z)
NOP (High-Z)
NOP (High-Z)
SRAM Status
Data Sheet M19866EJ1V0DS
CQ, CQ#
Internal
Internal
Boundary Scan Register Status
Pad
Pad
Pad
Pad
Pad
Internal
Pad
Pad
Pad
Pad
Pad
DQ
QDR
Pad
Boundary Scan
Register
CAPTURE
Register
Register
Update
JTAG ctrl
High-Z
Output
SRAM
Driver
No definition
No definition
Note
Internal
Output
SRAM
31

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