UPD44164362AF5-E33-EQ2 Renesas Electronics America, UPD44164362AF5-E33-EQ2 Datasheet - Page 20

• Manufacturer Part Number: UPD44164362AF5-E33-EQ2
• Description: SRAM DDRII 18MBIT CIO 165-PBGA
• Manufacturer: Renesas Electronics America

Specifications of UPD44164362AF5-E33-EQ2

• Format - Memory: RAM
• Memory Type: SRAM - Synchronous, DDR II
• Memory Size: 18M (512K x 36)
• Speed: 300MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.9 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Read and Write Cycle
20
Clock
Average Clock cycle time (K, K#, C, C#)
Clock phase jitter (K, K#, C, C#)
Clock HIGH time (K, K#, C, C#)
Clock LOW time (K, K#, C, C#)
Clock HIGH to Clock# HIGH
(K→K#, C→C#)
Clock# HIGH to Clock HIGH
(K#→K, C#→C)
Clock to data clock
(K→C, K#→C#)
DLL/PLL lock time (K, C)
K static to DLL/PLL reset
Output Times
C, C# HIGH to output valid
C, C# HIGH to output hold
C, C# HIGH to echo clock valid
C, C# HIGH to echo clock hold
CQ, CQ# HIGH to output valid
CQ, CQ# HIGH to output hold
C HIGH to output High-Z
C HIGH to output Low-Z
Setup Times
Address valid to K rising edge
Synchronous load input (LD#),
read write input (R, W#) valid to
K rising edge
Data inputs and write data select
inputs (BWx#, NWx#) valid to
K, K# rising edge
Hold Times
K rising edge to address hold
K rising edge to
synchronous load input (LD#),
read write input (R, W#) hold
K, K# rising edge to data inputs and
write data select inputs (BWx#, NWx#)
hold
Parameter
270 to 300 MHz
250 to 270 MHz
200 to 250 MHz
167 to 200 MHz
133 to 167 MHz
μ
< 133 MHz
PD44164082A-A, 44164092A-A, 44164182A-A, 44164362A-A
TKC reset
TCHCQV
TCHCQX
TCQHQV
TCQHQX
TKC lock
TCHQX1
TKHK#H
TK#HKH
TKC var
TKHCH
TCHQV
TCHQX
TCHQZ
Symbol
TKHKH
TAVKH
TDVKH
TKHAX
TKHDX
TKHKL
TKLKH
TIVKH
TKHIX
Data Sheet M19866EJ1V0DS
– 0.45
– 0.45
– 0.27
– 0.45
1,024
MIN.
1.32
1.32
1.49
1.49
3.3
0.4
0.4
0.3
0.4
0.4
0.3
(300 MHz)
30
–
0
0
0
0
0
0
–
–
–
–
-E33
MAX.
1.45
1.65
3.55
0.45
0.45
0.27
0.45
8.4
0.2
1.8
2.3
2.8
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
1,024
−0.45
−0.45
−0.45
MIN.
-E37, -E37Y
−0.3
0.35
0.35
3.7
1.5
1.5
1.7
1.7
0.5
0.5
0.5
0.5
(270 MHz)
30
−
–
0
0
0
0
0
−
−
−
−
MAX.
1.65
3.55
0.45
0.45
0.45
8.4
0.2
1.8
2.3
2.8
0.3
−
−
−
−
–
–
–
−
−
−
−
−
−
−
−
−
−
– 0.45
– 0.45
– 0.45
1,024
MIN.
-E40, -E40Y
– 0.3
0.35
0.35
(250 MHz)
4.0
1.6
1.6
1.8
1.8
0.5
0.5
0.5
0.5
30
–
–
–
0
0
0
0
–
–
–
–
MAX.
3.55
0.45
0.45
0.45
8.4
0.2
1.8
2.3
2.8
0.3
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
– 0.45
– 0.45
– 0.35
– 0.45
1,024
-E50, -E50Y
MIN.
(200 MHz)
5.0
2.0
2.0
2.2
2.2
0.6
0.6
0.4
0.6
0.6
0.4
30
–
–
–
–
0
0
0
–
–
–
–
MAX.
3.55
0.45
0.45
0.35
0.45
8.4
0.2
2.3
2.8
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Cycle
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note
1
2
3
4
5
5
6
6
6
6
6
6