PSD4235G2-90U STMicroelectronics, PSD4235G2-90U Datasheet - Page 22

• Manufacturer Part Number: PSD4235G2-90U
• Description: IC FLASH 4MBIT 90NS 80TQFP
• Manufacturer: STMicroelectronics

Specifications of PSD4235G2-90U

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 4M (512K x 8)
• Speed: 90ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 80-TQFP, 80-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-1968

PSD architectural overview
3.4
3.5
3.6
3.7
3.8
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MCU bus interface
The PSD easily interfaces easily with most 16-bit MCUs, either with multiplexed or non-
multiplexed address/data buses. The device is configured to respond to the MCU’s control
pins, which are also used as inputs to the PLDs.
ISP via JTAG port
In-System Programming (ISP) can be performed through the JTAG signals on Port E. This
serial interface allows complete programming of the entire PSD device. A blank device can
be completely programmed. The JTAG signals (TMS, TCK, TSTAT, TERR, TDI, TDO) can
be multiplexed with other functions on Port E.
Table 3.
Table 4.
In-System Programming (ISP)
Using the JTAG signals on Port E, the entire PSD device (memory, logic, configuration) can
be programmed or erased without the use of the MCU.
In-application programming (IAP)
The primary Flash memory can also be programmed, or re-programmed, in-system by the
MCU executing the programming algorithms out of the secondary Flash memory, or SRAM.
The secondary Flash memory can be programmed the same way by executing out of the
primary Flash memory.
different functional blocks of the PSD.
Page register
The 8-bit Page register expands the address range of the MCU by up to 256 times. The
paged address can be used as part of the address space to access external memory and
Decode PLD (DPLD)
Complex PLD (CPLD)
PE0
PE1
PE2
PE3
PE4
PE5
Port E pins
PLD I/O
JTAG signals on port E
Name
Table 5
indicates which programming methods can program
TMS
TCK
TDI
TDO
TSTAT
TERR
Inputs
Table 4
82
82
indicates the JTAG pin assignments.
JTAG signal
Outputs
17
24
Product Terms
PSD4235G2
150
43