PSD4235G2-90U STMicroelectronics, PSD4235G2-90U Datasheet - Page 26

• Manufacturer Part Number: PSD4235G2-90U
• Description: IC FLASH 4MBIT 90NS 80TQFP
• Manufacturer: STMicroelectronics

Specifications of PSD4235G2-90U

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 4M (512K x 8)
• Speed: 90ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 80-TQFP, 80-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-1968

PSD register description and address offsets
5
Table 6.
26/129
Register name
Data In
Control
Data Out
Direction
Drive Select
Input macrocell
Enable Out
Output
macrocells A
Output
macrocells B
Mask
macrocells A
Mask
macrocells B
Flash Memory
Protection
Flash Boot
Protection
JTAG Enable
PMMR0
PMMR2
Page
VM
PSD register description and address offsets
Table 6
address. The CSIOP space is the 256 bytes of address that is allocated by the user to the
internal PSD registers.
The following sections give a more detailed description.
Register address offset
Port
0A
0C
00
04
06
08
20
22
A
shows the offset addresses to the PSD registers relative to the CSIOP base
Port
0D
0B
01
05
07
09
21
23
B
Port
1C
10
14
16
18
C
Port
1A
Table 6
11
15
17
19
D
Port
30
32
34
36
38
E
provides brief descriptions of the registers in CSIOP space.
Port
4C
40
42
44
46
48
F
Port
41
43
45
47
49
G
Other
C0
C2
C7
B0
B4
E0
E2
(1)
Reads Port pin as input, MCU I/O
input mode
Selects mode between MCU I/O or
Address Out
Stores data for output to Port pins,
MCU I/O output mode
Configures Port pin as input or output
Configures Port pins as either CMOS
or Open Drain on some pins, while
selecting high slew rate on other pins.
Reads input macrocells
Reads the status of the output enable
to the I/O Port driver
READ - reads output of macrocells A
WRITE - loads macrocell Flip-flops
READ - reads output of macrocells B
WRITE - loads macrocell Flip-flops
Blocks writing to the output macrocells
A
Blocks writing to the output macrocells
B
Read only - Primary Flash Sector
Protection
Read only - PSD Security and
Secondary Flash memory Sector
Protection
Enables JTAG Port
Power Management register 0
Power Management register 2
Page register
Places PSD memory areas in
Program and/or Data space on an
individual basis.
Description
PSD4235G2