FAN5090MTC Fairchild Semiconductor, FAN5090MTC Datasheet - Page 13

• Manufacturer Part Number: FAN5090MTC
• Description: IC CTRLR DC-DC SYNC 2PH 24TSSOP
• Manufacturer: Fairchild Semiconductor

Specifications of FAN5090MTC

• Applications: Controller, Intel Pentium® IV
• Voltage - Input: 12V
• Number Of Outputs: 1
• Voltage - Output: 1.1 ~ 1.85 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 24-TSSOP
• Output Voltage: 22 V
• Output Current: 50 A
• Input Voltage: 10.8 V to 13.2 V
• Mounting Style: SMD/SMT
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PRODUCT SPECIFICATION
simultaneously (within less than
generating undesired output voltages. The Power Good flag
tracks the VID codes, but has a 500µsec delay transitioning
from high to low; long enough to ensure that there will not
be any glitches during dynamic voltage adjustment.
Power Good (PWRGD)
The FAN5090 Power Good function is designed in accor-
dance with the Pentium IV DC-DC converter specifications
and provides a continuous voltage monitor on the VFB pin.
The circuit compares the VFB signal to the VREF voltage
and outputs an active-low interrupt signal to the CPU should
the power supply voltage deviate more than -12% of its
nominal setpoint. The Power Good flag provides no control
functions to the FAN5090.
Output Enable/Soft Start (ENABLE/SS)
The FAN5090 will accept an open collector/TTL signal for
controlling the output voltage. The low state disables the
output voltage. When disabled, the PWRGD output is in the
low state.
Even if an enable is not required in the circuit, this pin
should have an attached capacitor (typically 100nF) to soft-
start the switching. A softstart capacitor may be chosen by
the formula:
where: t
However, C must be 100nF.
Programmable Active Droop™
The FAN5090 features Programmable Active Droop™: As
the output current increases, the output voltage drops propor-
tionately an amount programmed by an external resistor.
This feature allows maximum headroom for transient
response of the converter. The current is sensed losslessly by
measuring the voltage across the low-side MOSFET during
its on time. Consult the section on current sensing for details.
The droop is adjusted by the droop resistor changing the gain
of the current loop. Note that this method makes the droop
dependent on the temperature and initial tolerance of the
MOSFET, and the droop must be calculated taking account
of these tolerances. Given a maximum output current, the
amount of droop can be programmed with a resistor to
ground on the droop pin, according to the formula:
REV. 1.0.1 9/16/03
t
C
V
D
R
SS
OUT
is the ramp time of the output
is the delay time before the output starts to ramp
t
= softstart cap
D
= nominal output voltage
=
--------------
10 A
t
C
R
SS
=
--------------
10 A
C
--------------------------------------------------------- -
SS
1.7
+
V
----------------------------
0.9074 V
OUT
V
2.5
nsec) to avoid false codes
IN
0.9
OUT
with V
resistor, I
and R
MOSFET.
Important Note! The oscillator frequency must be selected
before selecting the droop resistor, because the value of R
used in the calculation of R
Over-Voltage Protection
The FAN5090 constantly monitors the output voltage for
protection against over-voltage conditions. If the voltage at
the VFB pin exceeds 2.2V, an over-voltage condition is
assumed and the FAN5090 latches on the external low-side
MOSFET and latches off the high-side MOSFET. The
DC-DC converter returns to normal operation only after V
has been recycled.
Over Temperature Protection
If the FAN5090 die temperature exceeds approximately
150 C, the IC shuts itself off. It remains off until the temper-
ature has dropped approximately 25 C, before it resumes
normal operation.
E* Mode
Further enhancements in light-load efficiency can be
obtained by operating the FAN5090 in E* mode. When the
DROOP pin is pulled to the 5V BYPASS voltage, the “A”
phase of the FAN5090 is completely turned off, reducing the
consumed gate charge power by half. E* mode can be
implemented using the circuit shown in figure 3.
Note: The HDRV charge pump should be connected to
“Phase B” of the FAN5093 circuit.
DSon
Droop
Figure 3. Implementing E* Mode Control
max
the on-state resistance of one phase’s low-side
E* Mode
the desired droop voltage, R
the output current at which the droop is desired,
(HIGH)
R
Droop
FJV3102R
Droop
=
------------------------------------ -
I
max
V
.
Droop
FJV4105R
R
R
DROOP
DS on
T
R
the oscillator
B
D
(pin 21)
T
(pin 6)
YPASS
ROOP
FAN5090
T
CC
13
is