IDT72T55248L6-7BB IDT, Integrated Device Technology Inc, IDT72T55248L6-7BB Datasheet - Page 63

• Manufacturer Part Number: IDT72T55248L6-7BB
• Description: IC CTRL QUADMUX FLOW 324-BGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT72T55248L6-7BB

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 72T55248L6-7BB

NOTES:
1. m0 = PAF0 offset.
2. D = maximum Queue depth. For density of Queue with bus-matching, refer to the bus-matching section on page 19.
3. PAF0 is asserted to LOW on WCLK0 transition and reset to HIGH on RCLK0 transition.
4. Select this mode by setting PFM LOW during Master Reset.
5. RCS0 is LOW, WCS0 is LOW, WDDR = LOW, and RDDR = LOW.
WCLK0
WCLK0
RCLK0
RCLK0
NOTES:
1. n0 = PAE0 offset.
2. For IDT Standard Mode.
3. For FWFT Mode.
4. PAE0 is asserted LOW on RCLK0 transition and reset to HIGH on WCLK0 transition.
5. Select this mode by setting PFM LOW during Master Reset.
6. RCS0 is LOW, WCS0 is LOW, WDDR = LOW, and RDDR = LOW.
IDT72T55248/72T55258/72T55268 2.5V QuadMux DDR Flow-Control Device with
Mux/Demux/Broadcast functions 8K x 40 x 4, 16K x 40 x 4 and 32K x 40 x 4
WEN0
WEN0
REN0
REN0
PAE0
PAF0
(Mux/Demux/Broadcast mode, IDT Standard and FWFT mode, SDR to SDR) x10 In to x10 Out
(Mux/Demux/Broadcast mode, IDT Standard and FWFT mode, SDR to SDR) x10 In to x10 Out
D - (m0 + 1) words in Queue
n0 + 1 words in Queue
Figure 38. Asynchronous Programmable Almost-Empty Flag Timing
n0 words in Queue
Figure 37. Asynchronous Programmable Almost-Full Flag Timing
t
t
CLKH
CLKH
(2)
(3)
,
t
t
ENS
ENS
t
t
CLKL
CLKL
63
t
ENH
t
t
t
PAEA
ENH
PAFA
t
ENS
t
ENS
n0 + 1 words in Queue
n 0+ 2 words in Queue
D - m0 words
in Queue
t
t
PAEA
PAFA
COMMERCIAL AND INDUSTRIAL
(2)
(3)
,
TEMPERATURE RANGES
n0 + 1 words in Queue
D - (m0 + 1) words
n0 words in Queue
FEBRUARY 01, 2009
in Queue
6157 drw35
6157 drw34
(2)
(3)
,