IDT88P8342BHI IDT, Integrated Device Technology Inc, IDT88P8342BHI Datasheet - Page 18

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IDT88P8342BHI

Manufacturer Part Number
IDT88P8342BHI
Description
IC SPI3-SPI4 EXCHANGE 820-PBGA
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT88P8342BHI

Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
88P8342BHI
Eye measurement
diagnostics table.
Output tap selection
Data sampling
(Block_base 0x0300 + Register_offset 0x00) selects an operating mode
between 80 MHz and 200 MHz or between 200 MHz and 400 MHz.
generated by a locked tapped delay line and clocked in to a register at the clock
IDT88P8342 SPI EXCHANGE 2 x SPI-3 TO SPI-4
C[0]= Rt.D2^Rt.D3
C[1]= Rt.D3^Rt.D4
…..
C[7]= Rt.D9^Rt+1.D0
C[8]= Rt+1.D0^Rt+1.D1
C[9]= Rt+1.D1^Rt+1.D2
Accumulation results during a window defined by W are stored in the
The latest result can be read out for diagnostic purposes.
The sampling tap is automatically selected based on the eye measurement.
The I_LOW field in the Table 89 SPI-4 ingress configuration register
Each lane is over-sampled by a factor of five. The over-sampled data is
CLK
Data
CLK
d0
D0
D0
d1
FF
D1
D1
d2
FF
D2
D2
d3
FF
Figure 7. Data sampling diagram
R(t)
R(t+1)
D3
D3
d4
FF
D4
D4
18
d5
FF
rate. The current samples c(n) and the previously generated samples provide
samples for the eye computation. The optimized sampling point will be selected
based on the eye computation. The tap selector is updated if necessary at the
end of the eye pattern measurement interval. The tap selector moves no more
than one tap at a time as a result of the eye pattern measurement.
D5
D5
d6
FF
D6
D6
d7
FF
D7
D7
d8
FF
INDUSTRIAL TEMPERATURE RANGE
D8
D8
d9
FF
D9
D9
FF
APRIL 10, 2006

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