IDT72P51777L7-5BBI IDT, Integrated Device Technology Inc, IDT72P51777L7-5BBI Datasheet - Page 58

• Manufacturer Part Number: IDT72P51777L7-5BBI
• Description: IC FLOW CTRL 40BIT 376-BGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT72P51777L7-5BBI

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 72P51777L7-5BBI

BUS MATCHING OPERATION
During a master reset of the multi-queue the state of the three setup pins, BM
[3:0] (Bus Matching), determine the input and output port bus widths as shown
in Table 16, “Bus Matching Configurations”. 20 bit words and 40 bit words can
be written into and read from the Queues. When writing to or reading from the
multi-queue in a bus matching mode, the device orders data in a “Little Endian”
format. See Figure 36, Bus Matching Byte Arrangement for details.
reads of data widths determined by the write port width. For example, if the input
TABLE 16 — BUS-MATCHING CONFIGURATIONS
IDT72P51767/72P51777 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES
(128 QUEUES) 40 BIT WIDE CONFIGURATION 5,898,240 and 11,796,480 bits
(IDR)
BM3
Bus Matching operation between the input port and output port is available.
The Full flag and Almost Full flag operation is always based on writes and
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
(ODR)
BM2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
BM1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
BM0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
DDR x40
DDR x40
DDR x40
DDR x40
DDR x20
DDR x20
DDR x20
DDR x20
SDR x40
SDR x40
SDR x40
SDR x40
SDR x20
SDR x20
SDR x20
SDR x20
Write
Port
DDR x40
DDR x20
DDR x40
DDR x20
DDR x40
DDR x20
DDR x40
DDR x20
SDR x40
SDR x20
SDR x40
SDR x20
SDR x40
SDR x20
SDR x40
SDR x20
Read
Port
PAE Default
16
16
16
16
16
32
32
32
16
32
32
32
16
32
32
64
58
port is x40 and the output port is x20, then two data reads from a full queue will
be required to cause the full flag to go HIGH (queue not full). Conversely, the
Empty flag and Almost Empty flag operations are always based on writes and
reads of data widths determined by the read port. For example, if the input port
is x20 and the output port is x40, two write operations will be required to cause
the Empty flag (EF) of an empty queue to go HIGH (queue is not empty).
port, therefore the input bus width to all queues is equal (determined by the input
port size) and the output bus width from all queues is equal (determined by the
output port size).
Note, that the input port serves all queues within a device, as does the output
PAF Default
D-16
D-16
D-16
D-16
D-16
D-32
D-32
D-32
D-16
D-32
D-32
D-32
D-16
D-32
D-32
D-64
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
FEBRUARY 11, 2009