TC58V64ADC-T051 Toshiba, TC58V64ADC-T051 Datasheet - Page 16

• Manufacturer Part Number: TC58V64ADC-T051
• Description: IC 64MBIT NAND SMART 3V 44TSOP
• Manufacturer: Toshiba

Specifications of TC58V64ADC-T051

• Memory Size: 8MB
• Memory Type: EEPROM - Smart Media
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: TC58V64DC-CT0501; TC58V64DC-CT0501

16384 pages
1024 blocks
Schematic Cell Layout and Address Assignment
Table 1. Addressing
First cycle
Second cycle
Third cycle
*: A8 is automatically set to Low or High by a 00H command or a 01H command.
*: I/O7 and I/O8 must be set to Low in the third cycle.
Operation Mode: Logic and Command Tables
operations shown in Table 3. Address input, command input and data input/output are controlled by the CLE,
ALE, CE , WE , RE and WP signals, as shown in Table 2.
Table 2. Logic table
Command Input
Data Input
Address Input
Serial Data Output
During Programming (Busy)
During Erasing (Busy)
Program, Erase Inhibit
H: V
The Program operation works on page units while the Erase operation works on block units.
The operation modes such as Program, Erase, Read and Reset are controlled by the ten different command
IH
, L: V
Figure 2. Schematic Cell Layout
IL
, *: V
IH
512
or V
528
I/O8
A16
IL
A7
*L
16
I/O7
A15
A6
*L
I/O6
A14
A22
A5
8I/O
I/O8
16 pages
1 block
I/O5
A13
A21
CLE
A4
H
L
L
L
*
*
*
I/O1
I/O4
A12
A20
A3
used for main memory storage and 16 bytes are for
redundancy or for other uses.
consecutive clock cycles, as shown in Table 1.
ALE
I/O3
A11
A19
H
A2
L
L
L
*
*
*
A page consists of 528 bytes in which 512 bytes are
An address is read in via the I/O port over three
1 page = 528 bytes
1 block = 528 bytes × 16 pages = (8K + 512) bytes
Capacity = 528 bytes × 16 pages × 1024 blocks
I/O2
A10
A18
A1
CE
L
L
L
L
*
*
*
I/O1
A17
A0
A9
A0~A7:
A9~A22: Page address
A13~A22: Block address
A9~A12: NAND address in block
WE
H
*
*
*
Column address
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TC58V64ADC
RE
H
H
H
*
*
*
WP
H
H
*
*
*
*
L