AC162078 Microchip Technology, AC162078 Datasheet - Page 23

HEADER INTRFC MPLAB ICD2 18F1330

AC162078

Manufacturer Part Number
AC162078
Description
HEADER INTRFC MPLAB ICD2 18F1330
Manufacturer
Microchip Technology
Datasheet

Specifications of AC162078

Accessory Type
Transition Header
Lead Free Status / RoHS Status
Not applicable / Not applicable
For Use With/related Products
ICD2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Not applicable / Not applicable

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AC162078
Manufacturer:
MICROCHIP
Quantity:
12 000
3.4
For timing insensitive applications, the “RC” and
“RCIO” device options offer additional cost savings.
The actual oscillator frequency is a function of several
factors:
• supply voltage
• values of the external resistor (R
• operating temperature
Given the same device, operating voltage and
temperature and component values, there will also be
unit-to-unit frequency variations. These are due to
factors such as:
• normal manufacturing variation
• difference in lead frame capacitance between
• variations within the tolerance of limits of R
In the RC Oscillator mode, the oscillator frequency
divided by 4 is available on the OSC2 pin. This signal
may be used for test purposes or to synchronize other
logic. Figure 3-5 shows how the R/C combination is
connected.
FIGURE 3-5:
The RCIO Oscillator mode (Figure 3-6) functions like
the RC mode, except that the OSC2 pin becomes an
additional general purpose I/O pin. The I/O pin
becomes bit 6 of PORTA (RA6).
FIGURE 3-6:
 2009 Microchip Technology Inc.
Recommended values: 3 k  R
Recommended values: 3 k  R
capacitor (C
package types (especially for low C
and C
C
C
V
V
R
R
EXT
SS
EXT
SS
EXT
EXT
V
V
EXT
DD
DD
RC Oscillator
RA6
EXT
F
OSC
)
/4
RC OSCILLATOR MODE
RCIO OSCILLATOR MODE
C
C
OSC1
OSC1
I/O (OSC2)
OSC2/CLKO
EXT
EXT
> 20 pF
> 20 pF
EXT
EXT
EXT
 100 k
 100 k
PIC18FXXXX
PIC18FXXXX
EXT
) and
values)
Internal
Internal
EXT
Clock
Clock
3.5
A Phase Locked Loop (PLL) circuit is provided as an
option for users who wish to use a lower frequency
oscillator circuit or to clock the device up to its highest
rated frequency from a crystal oscillator. This may be
useful for customers who are concerned with EMI due
to high-frequency crystals or users who require higher
clock speeds from an internal oscillator.
3.5.1
The HSPLL mode makes use of the HS mode oscillator
for frequencies up to 10 MHz. A PLL then multiplies the
oscillator output frequency by 4 to produce an internal
clock frequency up to 40 MHz. The PLLEN bit is not
available in this oscillator mode.
The PLL is only available to the crystal oscillator when
the FOSC3:FOSC0 Configuration bits are programmed
for HSPLL mode (= 0110).
FIGURE 3-7:
3.5.2
The PLL is also available to the internal oscillator block
in selected oscillator modes. In this configuration, the
PLL is enabled in software and generates a clock
output of up to 32 MHz. The operation of INTOSC with
the PLL is described in Section 3.6.4 “PLL in INTOSC
Modes”.
OSC2
OSC1
PLL Frequency Multiplier
PIC18F1230/1330
(from Configuration Register 1H)
HS Oscillator Enable
HS Mode
HSPLL OSCILLATOR MODE
PLL AND INTOSC
Crystal
Osc
PLL Enable
F
F
4
PLL BLOCK DIAGRAM
(HS MODE)
IN
OUT
Comparator
Loop
Filter
Phase
VCO
DS39758D-page 23
SYSCLK

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