AC162078 Microchip Technology, AC162078 Datasheet - Page 307

• Manufacturer Part Number: AC162078
• Description: HEADER INTRFC MPLAB ICD2 18F1330
• Manufacturer: Microchip Technology

Specifications of AC162078

• Accessory Type: Transition Header
• Lead Free Status / RoHS Status: Not applicable / Not applicable
• For Use With/related Products: ICD2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Not applicable / Not applicable

INDEX
A
A/D ................................................................................... 169
Absolute Maximum Ratings ............................................. 265
AC (Timing) Characteristics ............................................. 284
AC Characteristics
Access Bank
ADCON0 Register ............................................................ 169
ADCON1 Register ............................................................ 169
ADCON2 Register ............................................................ 169
ADDFSR .......................................................................... 258
ADDLW ............................................................................ 221
ADDULNK ........................................................................ 258
ADDWF ............................................................................ 221
ADDWFC ......................................................................... 222
ADRESH Register ............................................................ 169
ADRESL Register .................................................... 169, 172
Analog-to-Digital Converter. See A/D.
ANDLW ............................................................................ 222
ANDWF ............................................................................ 223
Assembler
B
BC .................................................................................... 223
BCF .................................................................................. 224
Block Diagrams
 2009 Microchip Technology Inc.
A/D Converter Interrupt, Configuring ....................... 173
Acquisition Requirements ........................................ 174
ADCON0 Register .................................................... 169
ADCON1 Register .................................................... 169
ADCON2 Register .................................................... 169
ADRESH Register ............................................ 169, 172
ADRESL Register .................................................... 169
Analog Port Pins, Configuring .................................. 176
Associated Registers ............................................... 178
Configuring the Module ............................................ 173
Conversion Clock (T
Conversion Requirements ....................................... 293
Conversion Status (GO/DONE Bit) .......................... 172
Conversions ............................................................. 177
Converter Characteristics ........................................ 292
Discharge ................................................................. 177
Operation in Power-Managed Modes ...................... 176
Selecting and Configuring Acquisition Time ............ 175
Triggering Conversions ............................................ 174
Conditions ................................................................ 285
Load Conditions for Device Timing Specifications ... 285
Parameter Symbology ............................................. 284
Temperature and Voltage Specifications ................. 285
Internal RC Accuracy ............................................... 287
Mapping with Indexed Literal Offset Addressing Mode ..
Remapping with Indexed Literal Offset Addressing Mode
GO/DONE Bit ........................................................... 172
MPASM Assembler .................................................. 212
A/D ........................................................................... 172
Analog Input Model .................................................. 173
Comparator Analog Input Model .............................. 181
Comparator Voltage Reference ............................... 185
Dead-Time Control Unit for One PWM Output Pair . 135
Device Clock .............................................................. 26
EUSART Receive .................................................... 160
EUSART Transmit ................................................... 158
69
............................................................................ 69
AD
) ........................................... 175
BN .................................................................................... 224
BNC ................................................................................. 225
BNN ................................................................................. 225
BNOV .............................................................................. 226
BNZ ................................................................................. 226
BOR. See Brown-out Reset.
BOV ................................................................................. 229
BRA ................................................................................. 227
Brown-out Reset (BOR) ..................................................... 42
BSF .................................................................................. 227
BTFSC ............................................................................. 228
BTFSS ............................................................................. 228
BTG ................................................................................. 229
BZ .................................................................................... 230
C
C Compilers
CALL ................................................................................ 230
CALLW ............................................................................ 259
Clock Sources .................................................................... 26
CLRF ............................................................................... 231
CLRWDT ......................................................................... 231
Code Examples
External Power-on Reset Circuit (Slow V
Fail-Safe Clock Monitor ........................................... 205
Generic I/O Port ......................................................... 87
Interrupt Logic ............................................................ 94
Low-Voltage Detect ................................................. 188
On-Chip Reset Circuit ................................................ 39
PIC18F1230/1330 ..................................................... 12
PLL (HS Mode) .......................................................... 23
Power Control PWM ................................................ 118
PWM (One Output Pair, Complementary Mode) ..... 119
PWM (One Output Pair, Independent Mode) .......... 119
PWM I/O Pin ............................................................ 142
PWM Time Base ...................................................... 121
Reads From Flash Program Memory ........................ 75
Single Comparator ................................................... 180
Table Read Operation ............................................... 71
Table Write Operation ............................................... 72
Table Writes to Flash Program Memory .................... 77
Timer0 in 16-Bit Mode ............................................. 108
Timer0 in 8-Bit Mode ............................................... 108
Timer1 ..................................................................... 112
Timer1 (16-Bit Read/Write Mode) ............................ 112
Watchdog Timer ...................................................... 202
Detecting ................................................................... 42
Disabling in Sleep Mode ............................................ 42
Software Enabled ...................................................... 42
MPLAB C18 ............................................................. 212
MPLAB C30 ............................................................. 212
Selecting the 31 kHz Source ..................................... 27
Selection Using OSCCON Register .......................... 27
16 x 16 Signed Multiply Routine ................................ 86
16 x 16 Unsigned Multiply Routine ............................ 86
8 x 8 Signed Multiply Routine .................................... 85
8 x 8 Unsigned Multiply Routine ................................ 85
Computed GOTO Using an Offset Value .................. 54
Data EEPROM Read ................................................. 83
Data EEPROM Refresh Routine ............................... 84
Data EEPROM Write ................................................. 83
Erasing a Flash Program Memory Row ..................... 76
Fast Register Stack ................................................... 54
41
PIC18F1230/1330
DS39758D-page 307
DD
Power-up)