CRD4525-Q1 Cirrus Logic Inc, CRD4525-Q1 Datasheet - Page 71

• Manufacturer Part Number: CRD4525-Q1
• Description: REFERENCE BOARD FOR CS4525 PWM
• Manufacturer: Cirrus Logic Inc
• Series: Popguard®r

Specifications of CRD4525-Q1

• Amplifier Type: Class D
• Output Type: 2-Channel (Stereo)
• Max Output Power X Channels @ Load: 15W x 2 @ 8 Ohm
• Voltage - Supply: 12 V ~ 18 V
• Operating Temperature: 0°C ~ 70°C
• Board Type: Fully Populated
• Utilized Ic / Part: CS4525
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 598-1586

DS726PP3
9.2
9.2.1
9.2.2
9.2.3
9.2.4
ADC/SP
7
Input Configuration (Address 02h)
Input Source Selection (ADC/SP)
Default = 0
Function:
This bit selects the audio input source.
ADC High-Pass Filter Enable (EnAnHPF)
Default = 1
Function:
Controls the operation of the ADC high-pass filter.
Serial Port Sample Rate (SPRate[1:0]) - Read Only
Function:
Identifies the sample rate of the incoming LRCK signal on the serial audio input port based on the setting
of the ClkFreq[1:0] bits in Register 01h, the frequency of the internal system clock, and the frequency of
the input LRCK signal.
Input Serial Port Digital Interface Format (DIF [2:0])
Default = 000
Function:
Selects the serial audio interface format used for the data in on SDIN. The required relationship between
the Left/Right clock, serial clock and serial data is defined by the Digital Interface Format and the options
are detailed in the section
ADC/SP Setting
EnAnHPF Setting
SPRate[1:0] Setting
DIF[2:0] Setting
0 ..........................................Digital input from the serial audio input port.
1 ..........................................Analog input from the internal ADC.
0 ..........................................ADC high-pass filter disabled.
1 ..........................................ADC high-pass filter enabled.
00 ........................................32 kHz
01 ........................................44.1 kHz
10 ........................................48 kHz
11.........................................96 kHz
000 ......................................Left-Justified, up to 24-bit data.
001 ......................................I²S, up to 24-bit data.
010 ......................................Right-Justified, 24-bit data.
011.......................................Right-Justified, 20-bit data.
100 ......................................Right-Justified, 18-bit data.
101 ......................................Right-Justified, 16-bit data.
110.......................................Reserved.
111 .......................................Reserved.
EnAnHPF
6
Reserved
Audio Input Source
ADC High-Pass Filter State
Identified Input Sample Rate
Input Serial Port Serial Audio Interface Format
5
“Serial Audio Interfaces” on page
SPRate1
4
SPRate0
3
62.
DIF2
2
DIF1
1
CS4525
DIF0
0
71