DM300023 Microchip Technology, DM300023 Datasheet - Page 61

• Manufacturer Part Number: DM300023
• Description: KIT DEMO DSPICDEM SMPS BUCK
• Manufacturer: Microchip Technology
• Series: dsPIC™r

Specifications of DM300023

• Main Purpose: DC/DC, Step Down
• Outputs And Type: 2, Non-Isolated
• Voltage - Input: 7 ~ 15V
• Regulator Topology: Buck
• Board Type: Fully Populated
• Utilized Ic / Part: dsPIC30F2020
• Processor To Be Evaluated: dsPIC30F202x/1010
• Interface Type: RS-232
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output: -
• Voltage - Output: -
• Power - Output: -
• Frequency - Switching: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

REGISTER 5-6:
© 2006 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
bit 7
bit 6
bit 5
bit 4
bit 3
R/W-0
T3IE
U-0
—
Unimplemented: Read as ‘0’
MI2CIE: I
1 = Interrupt request enabled
0 = Interrupt request not enabled
SI2CIE: I
1 = Interrupt request enabled
0 = Interrupt request not enabled
NVMIE: Nonvolatile Memory Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
ADIE: ADC Conversion Complete Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
U1TXIE: UART1 Transmitter Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
U1RXIE: UART1 Receiver Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
SPI1IE: SPI1 Event Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
T3IE: Timer3 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
T2IE: Timer2 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
OC2IE: Output Compare Channel 2 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
Unimplemented: Read as ‘0’
T1IE: Timer1 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
MI2CIE
R/W-0
R/W-0
T2IE
IEC0: INTERRUPT ENABLE CONTROL REGISTER 0
2
2
C Slave Events Interrupt Enable bit
C Master Events Interrupt Enable bit
W = Writable bit
‘1’ = Bit is set
SI2CIE
OC2IE
R/W-0
R/W-0
NVMIE
R/W-0
U-0
Preliminary
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
R/W-0
ADIE
T1IE
dsPIC30F1010/202X
U1TXIE
OC1IE
R/W-0
R/W-0
x = Bit is unknown
U1RXIE
R/W-0
R/W-0
IC1IE
DS70178C-page 59
SPI1IE
INT0IE
R/W-0
R/W-0
bit 8
bit 0