C8051F700DK Silicon Laboratories Inc, C8051F700DK Datasheet - Page 191

DEV KIT FOR C8051F700

C8051F700DK

Manufacturer Part Number
C8051F700DK
Description
DEV KIT FOR C8051F700
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F700DK

Contents
Board, Cables, CD, Debugger, Power Supply
Processor To Be Evaluated
C8051F7x
Processor Series
C8051F7xx
Interface Type
USB
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F7xx
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1635
SFR Definition 28.2. XBR1: Port I/O Crossbar Register 1
SFR Address = 0xE2; SFR Page = F
Name WEAKPUD
Reset
Bit
1:0 PCA0ME[1:0] PCA Module I/O Enable Bits.
Type
7
6
5
4
3
2
Bit
WEAKPUD
Unused
XBARE
Name
ECIE
T1E
T0E
R/W
7
0
Port I/O Weak Pullup Disable.
0: Weak Pullups enabled (except for Ports whose I/O are configured for analog
mode).
1: Weak Pullups disabled.
Crossbar Enable.
0: Crossbar disabled.
1: Crossbar enabled.
T1 Enable.
0: T1 unavailable at Port pin.
1: T1 routed to Port pin.
T0 Enable.
0: T0 unavailable at Port pin.
1: T0 routed to Port pin.
PCA0 External Counter Input Enable.
0: ECI unavailable at Port pin.
1: ECI routed to Port pin.
Read = 0b; Write = Don’t Care.
00: All PCA I/O unavailable at Port pins.
01: CEX0 routed to Port pin.
10: CEX0, CEX1 routed to Port pins.
11: CEX0, CEX1, CEX2 routed to Port pins.
XBARE
R/W
6
0
R/W
T1E
5
0
Rev. 1.0
R/W
T0E
4
0
Function
ECIE
R/W
3
0
C8051F70x/71x
R
2
0
R/W
PCA0ME[1:0]
1
0
R/W
0
0
191

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