C8051F700DK Silicon Laboratories Inc, C8051F700DK Datasheet - Page 52
![DEV KIT FOR C8051F700](/photos/9/23/92340/c8051f700dk_sml.jpg)
C8051F700DK
Manufacturer Part Number
C8051F700DK
Description
DEV KIT FOR C8051F700
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets
1.C8051F700-TB.pdf
(1 pages)
2.C8051F700-TB.pdf
(306 pages)
3.C8051F700-TB.pdf
(18 pages)
Specifications of C8051F700DK
Contents
Board, Cables, CD, Debugger, Power Supply
Processor To Be Evaluated
C8051F7x
Processor Series
C8051F7xx
Interface Type
USB
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F7xx
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1635
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- Download datasheet (2Mb)
C8051F70x/71x
Table 9.9. EEPROM Electrical Characteristics
V
Table 9.10. ADC0 Electrical Characteristics
V
52
Parameter
DC Accuracy
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Full Scale Error
Offset Temperature Coefficient
Dynamic performance (10 kHz sine-wave single-ended input, 1 dB below Full Scale, 500 ksps)
Signal-to-Noise Plus Distortion
Total Harmonic Distortion
Spurious-Free Dynamic Range
Conversion Rate
SAR Conversion Clock
Conversion Time in SAR Clocks
Track/Hold Acquisition Time
Throughput Rate
Analog Inputs
ADC Input Voltage Range
Sampling Capacitance
Input Multiplexer Impedance
Power Specifications
Power Supply Current
Power Supply Rejection
Parameter
Write to EEPROM from RAM
Read of EEPROM to RAM
Endurance (Writes)
Clock Speed During EEPROM
Write Operations
Note: T
DD
DD
= 1.8 to 3.6 V; T
= 3.0 V, VREF = 2.40 V (REFSL=0),
SYSCLK
is equal to one period of the device system clock (SYSCLK).
A
= –40 to +85 °C unless otherwise specified. Use factory-calibrated settings.
–
Operating Mode, 500 ksps
40 to +85 °C unless otherwise specified.
Guaranteed Monotonic
Up to the 5th harmonic
Conditions
V
10-bit Mode
V
Conditions
8-bit Mode
DD
0.5x Gain
DD
1x Gain
>= 2.0 V
Rev. 1.0
< 2.0 V
300000
Min
—
1
Min
300
2.0
–2
–2
56
13
11
—
—
—
—
—
—
—
—
—
—
—
—
0
50 x T
Typ
±0.5
±0.5
—
—
—
Typ
–75
600
–70
10
45
60
72
SYSCLK
—
—
—
—
—
—
—
0
0
5
3
5
VREF
1000
Max
8.33
500
±1
±1
—
—
—
—
—
—
—
—
—
—
—
—
2
2
Max
—
—
—
3
ppm/°C
clocks
clocks
Units
MHz
ksps
LSB
LSB
LSB
LSB
cycles
Units
bits
dB
dB
dB
k
µA
dB
ns
µs
pF
pF
MHz
V
ms
µs
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