MC56F8367EVME Freescale Semiconductor, MC56F8367EVME Datasheet - Page 69
MC56F8367EVME
Manufacturer Part Number
MC56F8367EVME
Description
EVAL BOARD FOR MC56F83X
Manufacturer
Freescale Semiconductor
Type
DSPr
Specifications of MC56F8367EVME
Contents
Module and Misc Hardware
Processor To Be Evaluated
MC56F8145-67 and MC56F8345-67
Data Bus Width
16 bit
Interface Type
RS-232
Silicon Manufacturer
Freescale
Core Architecture
56800/E
Core Sub-architecture
56800/E
Silicon Core Number
MC56F
Silicon Family Name
MC56F83xx
Rohs Compliant
Yes
For Use With/related Products
MC56F83x5, MC56F83x6, MC56F83x7
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Preliminary
GPIOF_PUR
GPIOF_DR
GPIOF_DDR
GPIOF_PER
GPIOF_IAR
GPIOF_IENR
GPIOF_IPOLR
GPIOF_IPR
GPIOF_IESR
GPIOF_PPMODE
GPIOF_RAWDATA
SIM_CONTROL
SIM_RSTSTS
SIM_SCR0
SIM_SCR1
SIM_SCR2
SIM_SCR3
SIM_MSH_ID
SIM_LSH_ID
SIM_PUDR
SIM_CLKOSR
SIM_GPS
SIM_PCE
SIM_ISALH
SIM_ISALL
SIM_PCE2
Register Acronym
Register Acronym
Table 4-35 System Integration Module Registers Address Map
Table 4-34 GPIOF Registers Address Map
Address Offset
Address Offset
(GPIOF_BASE = $00 F340)
$A
$0
$1
$2
$3
$4
$5
$6
$7
$8
$9
$C
$D
$A
$B
$E
$F
$0
$1
$2
$3
$4
$5
$6
$7
$8
(SIM_BASE = $00 F350)
56F8367 Technical Data, Rev. 8
Pull-up Enable Register
Data Register
Data Direction Register
Peripheral Enable Register
Interrupt Assert Register
Interrupt Enable Register
Interrupt Polarity Register
Interrupt Pending Register
Interrupt Edge-Sensitive Register
Push-Pull Mode Register
Raw Data Input Register
Control Register
Reset Status Register
Software Control Register 0
Software Control Register 1
Software Control Register 2
Software Control Register 3
Most Significant Half JTAG ID
Least Significant Half JTAG ID
Pull-up Disable Register
Reserved
Clock Out Select Register
Quad Decoder 1 / Timer B / SPI 1 Select Register
Peripheral Clock Enable Register
I/O Short Address Location High Register
I/O Short Address Location Low Register
Peripheral Clock Enable Register 2
Register Description
Register Description
Peripheral Memory Mapped Registers
Reset Value
0 x FFFF
0 x FFFF
0 x FFFF
0 x 0000
0 x 0000
0 x 0000
0 x 0000
0 x 0000
0 x 0000
0 x 0000
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