EZ80F920200ZCO Zilog, EZ80F920200ZCO Datasheet - Page 33
EZ80F920200ZCO
Manufacturer Part Number
EZ80F920200ZCO
Description
KIT DEV FOR EZ80F92 W/C-COMPILER
Manufacturer
Zilog
Series
eZ80 Acclaim!®r
Type
MCUr
Datasheet
1.EZ80F920200ZCO.pdf
(90 pages)
Specifications of EZ80F920200ZCO
Contents
2 Primary Boards, Hardware, Software and Documentation
For Use With/related Products
eZ80F92
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3162
EZ80F920200ZCO
EZ80F920200ZCO
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UM013904-0203
Signal
A[0:7]
A[8:15]
A[16:23]
RD
RESET
BUSACK
NMI
D[0:7]
CS[0:3]
MREQ
WR
INSTRD
BUSREQ
PHI
Note: *All of the signals except BUSACK and INSTRD are driven by low-voltage
CMOS technology (LVC) drivers.
I/O Functionality
The eZ80190 microprocessor features General-Purpose I/O functionality
at Port A. The eZ80F92 device does not incorporate this Port A feature.
The eZ80
featuring GPIO for devices without Port A, an LED matrix, a modem
reset, and two user triggers.
Pin #
3–10
13–20
23–30
33
35
37
39
43–50
53–56
57
34
36
38
40
®
Table 5. CPU Bus Connector J8*
Development Platform provides additional I/O functionality,
PRELIMINARY
Function
Address Bus, Low Byte
Address Bus, High Byte
Address Bus, Upper Byte
Read Signal
Push Button Reset
CPU Bus Acknowledge Signal
Nonmaskable Interrupt
Data Bus
Chip Selects
Memory Request
WRITE Signal
Instruction Fetch
CPU Bus Request signal
Clock output of the CPU
eZ80F92 Development Kit
Operational Description
Direction
Output
Output
Output
Output
Output
Output
Input
Bidirectional
Output
Output
Output
Output
User Manual
23
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