EZ80F920200ZCO Zilog, EZ80F920200ZCO Datasheet - Page 37

• Manufacturer Part Number: EZ80F920200ZCO
• Description: KIT DEV FOR EZ80F92 W/C-COMPILER
• Manufacturer: Zilog
• Series: eZ80 Acclaim!®r
• Type: MCUr

Specifications of EZ80F920200ZCO

• Contents: 2 Primary Boards, Hardware, Software and Documentation
• For Use With/related Products: eZ80F92
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 269-3162; EZ80F920200ZCO

eZ80F92 Development Kit
User Manual
27
An LED display sample program is shipped with the eZ80F92 Develop-
ment Kit. Please refer to the
eZ80Acclaim! Development Kits Quick Start
Guide
(QS0020) or to the Tutorial section in the
ZiLOG Developer Stu-
dio—eZ80Acclaim! User Manual
(UM0144).
Modem Reset
The Modem Reset signal, MRESET, is used to reset an optional socket
modem. This signal is controlled by bit 5 in the register shown in Table 9.
The MRESET signal is available at the embedded modem socket inter-
face (J9, Pin1). Setting this bit Low places the optional socket modem
into a reset state. The user must pull this bit High again to enable the
socket modem. Reference the appropriate documentation for the socket
modem to reset timing requirements.
User Triggers
®
Two general-purpose trigger output pins are provided on the eZ80
Development Platform. Labeled J21 (Trig2) and J22 (Trig1), these pins
allow the user a way to trigger external equipment to aid in the debug of
the system. See Figure 8 for trigger pin details.
J21
J22
Ground
Trigger output
Trig2
Trig1
Figure 8. Trigger Pins J21 and J22
Bits 6 and 7 in Table 9 are the control bits for the user triggers. If either
bit is a 1, the corresponding Trig1 and Trig2 signals are driven High. If
either bit is 0, the corresponding Trig1 and Trig2 signals are driven Low.
UM013904-0203
PRELIMINARY
Operational Description