YR0K42378FC000BA Renesas Electronics America, YR0K42378FC000BA Datasheet - Page 244
YR0K42378FC000BA
Manufacturer Part Number
YR0K42378FC000BA
Description
KIT EVAL FOR H8S/2378
Manufacturer
Renesas Electronics America
Series
H8®r
Type
MCUr
Datasheet
1.YR0K42378FC000BA.pdf
(1208 pages)
Specifications of YR0K42378FC000BA
Contents
Board
For Use With/related Products
H8S/2378
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- Current page: 244 of 1208
- Download datasheet (8Mb)
Section 6 Bus Controller (BSC)
6.5
The basic bus interface enables direct connection of ROM, SRAM, and so on.
6.5.1
Data sizes for the CPU and other internal bus masters are byte, word, and longword. The bus
controller has a data alignment function, and when accessing external address space, controls
whether the upper data bus (D15 to D8) or lower data bus (D7 to D0) is used according to the bus
specifications for the area being accessed (8-bit access space or 16-bit access space) and the data
size.
8-Bit Access Space: Figure 6.8 illustrates data alignment control for the 8-bit access space. With
the 8-bit access space, the upper data bus (D15 to D8) is always used for accesses. The amount of
data that can be accessed at one time is one byte: a word access is performed as two byte accesses,
and a longword access, as four byte accesses.
Rev.7.00 Mar. 18, 2009 page 176 of 1136
REJ09B0109-0700
Basic Bus Interface
Data Size and Data Alignment
φ
Address bus
CSn
Figure 6.7 CSn Signal Output Timing (n = 0 to 7)
T
1
Area n external address
Bus cycle
T
2
T
3
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