YR0K42378FC000BA Renesas Electronics America, YR0K42378FC000BA Datasheet - Page 456

Manufacturer Part Number

YR0K42378FC000BA

KIT EVAL FOR H8S/2378

Manufacturer

Renesas Electronics America

For Use With/related Products

Lead Free Status / RoHS Status

Contains lead / RoHS non-compliant

Section 8 EXDMA Controller (EXDMAC)

EDA Bit in EDMDR: The EDA bit in EDMDR is written to by the CPU to control enabling and

disabling of data transfer, but may be cleared automatically by the EXDMAC due to the DMA

transfer status. There are also periods during transfer when a 0-write to the EDA bit by the CPU is

not immediately effective.

Conditions for EDA bit clearing by the EXDMAC include the following:

• When the EDTCR value changes from 1 to 0, and transfer ends

• When a repeat area overflow interrupt is requested, and transfer ends

• When an NMI interrupt is generated, and transfer halts

• Hardware standby mode

• When 0 is written to the EDA bit, and transfer halts

When transfer is halted by writing 0 to the EDA bit, the EDA bit remains at 1 during the DMA

transfer period. In block transfer mode, since a block-size transfer is carried out without

interruption, the EDA bit remains at 1 from the time 0 is written to it until the end of the current

block-size transfer.

Rev.7.00 Mar. 18, 2009 page 388 of 1136

REJ09B0109-0700

EDTCR in normal transfer mode

EDTCR in block transfer mode

Figure 8.11 EDTCR Update Operations in Normal Transfer Mode and

1 to H'FFFFFF

Before update

Block Transfer Mode

0 to H'FFFFFE

After update