ST92F150-EMU2 STMicroelectronics, ST92F150-EMU2 Datasheet - Page 262

• Manufacturer Part Number: ST92F150-EMU2
• Description: BOARD EMULATOR FOR ST9 SERIES
• Manufacturer: STMicroelectronics
• Series: ST9-EMU2r
• Type: Microcontrollerr

Specifications of ST92F150-EMU2

• Contents: ST9 Visual Debug IDE, ST9 HDS2V2 Mainboard, Probe, Sockets, Adapters, Power Supply,Cables & Documentation
• For Use With/related Products: ST9 MCUs
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 497-3101

I2C BUS INTERFACE
10.8 I
10.8.1 Introduction
The I
tween the microcontroller and the serial I
provides both multimaster and slave functions with
both 7-bit and 10-bit address modes; it controls all
I
timing and supports both standard (100KHz) and
fast I
Using DMA, data can be transferred with minimum
use of CPU time.
The peripheral uses two external lines to perform
the protocols: SDA, SCL.
10.8.2 Main Features
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2
2
2
C bus-specific sequencing, protocol, arbitration,
C Master Features:
C Slave Features:
Parallel-bus/I
Multi-master capability
7-bit/10-bit Addressing
Standard I
Transmitter/Receiver flag
End-of-byte transmission flag
Transfer problem detection
Interrupt generation on error conditions
Interrupt generation on transfer request and on
data received
Start bit detection flag
Clock generation
I
Arbitration Lost flag
End of byte transmission flag
Transmitter/Receiver flag
Stop/Start generation
Stop bit detection
I
Detection of misplaced start or stop condition
Programmable I
bit and 10-bit mode)
General Call address programmable
Transfer problem detection
End of byte transmission flag
Transmitter/Receiver flag.
2
2
C bus busy flag
C bus busy flag
2
2
C modes (400KHz).
2
C bus Interface serves as an interface be-
C BUS INTERFACE
2
C mode/Fast I
2
C protocol converter
2
C Address detection (both 7-
2
C mode
2
C bus. It
Interrupt Features:
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DMA Features:
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Interrupt generation on error condition, on
transmission request and on data received
Interrupt address vector for each interrupt
source
Pending bit and mask bit for each interrupt
source
Programmable interrupt priority respects the
other peripherals of the microcontroller
Interrupt address vector programmable
DMA both in transmission and in reception with
enabling bits
DMA from/toward both Register File and
Memory
End Of Block interrupt sources with the related
pending bits