ST92F150-EMU2 STMicroelectronics, ST92F150-EMU2 Datasheet - Page 422

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ST92F150-EMU2

Manufacturer Part Number
ST92F150-EMU2
Description
BOARD EMULATOR FOR ST9 SERIES
Manufacturer
STMicroelectronics
Series
ST9-EMU2r
Type
Microcontrollerr
Datasheets

Specifications of ST92F150-EMU2

Contents
ST9 Visual Debug IDE, ST9 HDS2V2 Mainboard, Probe, Sockets, Adapters, Power Supply,Cables & Documentation
For Use With/related Products
ST9 MCUs
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
497-3101
ST92F124/F150/F250 - KNOWN LIMITATIONS
KNOWN LIMITATIONS (Cont’d)
Here is an example of a patch for the MFT1 using
DMA in ouput compare mode, inserted at the be-
ginning of the MFT0 interrupt routine:
spp #8 ;Set to page 8 (mft1)
tm T_IDMR,#0x08 ;test mft0 OCMP dma
mask bit
jxnz MFT0_it_routine
cpw DMA_CNT1,#0 ;If the DMA count is
not at zero the block did not complete
jxeq MFT0_it_routine
and T_FLAGR,#11011111b ;Clear dma
compare interrupt request
422/429
1
or T_IDMR,#0x08 ;Re-enable the com-
pare 0 dma
MFT0_it_routine: ;MFT0 interrupt rou-
tine code
In addition, the peripheral DMA priorities must be
organized so that the MFT DMA priorities are the
highest. This way the impact is limited: DMA re-
quests with the wrong Mask Bit Reset are serv-
iced.
Workaround Limitation
If the counter event period is too short, the failure
recovery in the interrupt routines will not work.

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