MPC564EVB Freescale Semiconductor, MPC564EVB Datasheet - Page 438

KIT EVAL FOR MPC561/562/563/564

MPC564EVB

Manufacturer Part Number
MPC564EVB
Description
KIT EVAL FOR MPC561/562/563/564
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Datasheets

Specifications of MPC564EVB

Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC56x
Data Bus Width
32 bit
Interface Type
RS-232, Ethernet
For Use With/related Products
MPC561, 562, 563, 564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
L-Bus to U-Bus Interface (L2U)
11.3
Figure 11-1
MPC561/MPC563 bus architecture.
11-2
Supports a default global entry for memory space not covered by other regions:
— Default access protection
— Default guarded attribute
Interrupt generated upon:
— Access violation
— Load from guarded region
— Write to read-only region
The MSR[DR] bit (data relocate) controls DMPU protection on/off operation
Programming is done using the mtspr/mfspr instructions to/from implementation-specific special
purpose registers.
No protection for accesses to the CALRAM module on the L-bus (CALRAM has its own
protection options)
L2U Block Diagram
– Access protection: user or supervisor
– Guarded attribute: speculative or non-speculative
– Enable/disable option
– Read only option
shows a block diagram of the L-bus to U-bus interface as implemented in the overall
MPC561/MPC563 Reference Manual, Rev. 1.2
Freescale Semiconductor

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