MPC564EVB Freescale Semiconductor, MPC564EVB Datasheet - Page 46

• Manufacturer Part Number: MPC564EVB
• Description: KIT EVAL FOR MPC561/562/563/564
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC564EVB

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC56x
• Data Bus Width: 32 bit
• Interface Type: RS-232, Ethernet
• For Use With/related Products: MPC561, 562, 563, 564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

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Figure
Number
Example of External Multiplexing ......................................................................................... 13-6
Module Configuration Register (QADCMCR) ...................................................................... 13-8
QADC Interrupt Register (QADCINT) ................................................................................ 13-12
Interrupt Levels on IRQ with ILBS ...................................................................................... 13-13
Control Register 0 (QACR0) ................................................................................................ 13-15
Control Register 2 (QACR2) ................................................................................................ 13-18
Status Register 0 (QASR0) ................................................................................................... 13-21
QADC64E Queue Status Transition ..................................................................................... 13-26
Status Register 1 (QASR1) ................................................................................................... 13-27
QADC64E Conversion Queue Operation............................................................................. 13-28
Conversion Command Word Table (CCW) ......................................................................... 13-30
Right Justified, Unsigned Result Format (RJURR).............................................................. 13-33
Left Justified, Signed Result Format (LJSRR) ..................................................................... 13-33
Left Justified, Unsigned Result Register (LJURR) .............................................................. 13-33
QADC64E Analog Subsystem Block Diagram .................................................................... 13-34
Conversion Timing ............................................................................................................... 13-35
Bypass Mode Conversion Timing ........................................................................................ 13-36
QADC64E Queue Operation with Pause.............................................................................. 13-39
QADC64E Clock Subsystem Functions ............................................................................... 13-48
QADC64E Clock Programmability Examples ..................................................................... 13-50
Bus Cycle Accesses .............................................................................................................. 13-53
CCW Priority Situation 1...................................................................................................... 13-56
CCW Priority Situation 2...................................................................................................... 13-56
CCW Priority Situation 3...................................................................................................... 13-57
CCW Priority Situation 4...................................................................................................... 13-57
CCW Priority Situation 5...................................................................................................... 13-58
CCW Priority Situation 6...................................................................................................... 13-58
CCW Priority Situation 7...................................................................................................... 13-59
CCW Priority Situation 8...................................................................................................... 13-59
CCW Priority Situation 9...................................................................................................... 13-60
CCW Priority Situation 10.................................................................................................... 13-60
CCW Priority Situation 11.................................................................................................... 13-61
CCW Freeze Situation 12 ..................................................................................................... 13-61
CCW Freeze Situation 13 ..................................................................................................... 13-62
CCW Freeze Situation 14 ..................................................................................................... 13-62
CCW Freeze Situation 15 ..................................................................................................... 13-62
CCW Freeze Situation 16 ..................................................................................................... 13-62
Port
Port A Data Direction Register (DDRQA) .......................................................................... 13-14
Control Register 1 (QACR1) ............................................................................................... 13-16
x
Data Register (PORTQA and PORTQB).................................................................. 13-13
MPC561/MPC563 Reference Manual, Rev. 1.2
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