PIC18F26K20-E/SO Microchip Technology, PIC18F26K20-E/SO Datasheet - Page 213

• Manufacturer Part Number: PIC18F26K20-E/SO
• Description: IC PIC MCU FLASH 16KX16 28-SOIC
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F26K20-E/SO

• Program Memory Type: FLASH
• Program Memory Size: 64KB (32K x 16)
• Package / Case: 28-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 24
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: CCP/ECCP/EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 4
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 11-ch x 10-bit
• Package: 28SOIC W
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 64 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPAC164303 - MODULE SKT FOR PM3 64TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

17.4.3.4
An SSP Mask (SSPMSK) register is available in I
Slave mode as a mask for the value held in the
SSPSR register during an address comparison
operation. A zero (‘0’) bit in the SSPMSK register has
the effect of making the corresponding bit in the
SSPSR register a “don’t care”.
This register is reset to all ‘1’s upon any Reset
condition and, therefore, has no effect on standard
SSP operation until written with a mask value.
REGISTER 17-7:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-1
bit 0
Note 1: The MSK0 bit is used only in 10-bit slave mode. In all other modes, this bit has no effect.
R/W-1
MSK7
SSP Mask Register
MSK<7:1>: Mask bits
1 = The received address bit n is compared to SSPADD<n> to detect I
0 = The received address bit n is not used to detect I
MSK<0>: Mask bit for I
I
1 = The received address bit 0 is compared to SSPADD<0> to detect I
0 = The received address bit 0 is not used to detect I
2
C Slave mode, 10-bit Address (SSPM<3:0> = 0111):
R/W-1
MSK6
SSPMSK: SSP MASK REGISTER
W = Writable bit
‘1’ = Bit is set
R/W-1
MSK5
2
C Slave mode, 10-bit Address
R/W-1
MSK4
2
C
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-1
MSK3
This register must be initiated prior to setting
SSPM<3:0> bits to select the I
10-bit address).
The SSP Mask register is active during:
• 7-bit Address mode: address compare of A<7:1>.
• 10-bit Address mode: address compare of A<7:0>
PIC18F2XK20/4XK20
only. The SSP mask has no effect during the
reception of the first (high) byte of the address.
2
2
C address match
(1)
C address match
R/W-1
MSK2
2
2
C address match
C address match
x = Bit is unknown
R/W-1
MSK1
2
C Slave mode (7-bit or
DS41303G-page 213
MSK0
R/W-1
(1)
bit 0