PIC18F26K20-E/SO Microchip Technology, PIC18F26K20-E/SO Datasheet - Page 89

• Manufacturer Part Number: PIC18F26K20-E/SO
• Description: IC PIC MCU FLASH 16KX16 28-SOIC
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F26K20-E/SO

• Program Memory Type: FLASH
• Program Memory Size: 64KB (32K x 16)
• Package / Case: 28-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 24
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: CCP/ECCP/EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 4
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 11-ch x 10-bit
• Package: 28SOIC W
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 64 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPAC164303 - MODULE SKT FOR PM3 64TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

6.0
The Flash program memory is readable, writable and
erasable during normal operation over the entire V
range.
A read from program memory is executed one byte at
a time. A write to program memory is executed on
blocks of 64, 32 or 16 bytes at a time, depending on the
specific device (See Table 6-1). Program memory is
erased in blocks of 64 bytes at a time. The difference
between the write and erase block sizes requires from
1 to 4 block writes to restore the contents of a single
block erase. A bulk erase operation cannot be issued
from user code.
TABLE 6-1:
Writing or erasing program memory will cease
instruction fetches until the operation is complete. The
program memory cannot be accessed during the write
or erase, therefore, code cannot execute. An internal
programming timer terminates program memory writes
and erases.
FIGURE 6-1:
 2010 Microchip Technology Inc.
PIC18F43K20,
PIC18F23K20
PIC18F24K20,
PIC18F25K20,
PIC18F44K20,
PIC18F45K20
PIC18F26K20,
PIC18F46K20
Note 1: Table Pointer register points to a byte in program memory.
Device
TBLPTRU
FLASH PROGRAM MEMORY
Table Pointer
WRITE/ERASE BLOCK SIZES
TBLPTRH
TABLE READ OPERATION
Size (bytes)
Write Block
(1)
16
32
64
TBLPTRL
Program Memory
(TBLPTR)
Erase Block
Size (bytes)
64
64
64
DD
Instruction: TBLRD*
Program Memory
A value written to program memory does not need to be
a valid instruction. Executing a program memory
location that forms an invalid instruction results in a
NOP.
6.1
In order to read and write program memory, there are
two operations that allow the processor to move bytes
between the program memory space and the data RAM:
• Table Read (TBLRD)
• Table Write (TBLWT)
The program memory space is 16 bits wide, while the
data RAM space is 8 bits wide. Table reads and table
writes move data between these two memory spaces
through an 8-bit register (TABLAT).
The table read operation retrieves one byte of data
directly from program memory and places it into the
TABLAT register. Figure 6-1 shows the operation of a
table read.
The table write operation stores one byte of data from the
TABLAT register into a write block holding register. The
procedure to write the contents of the holding registers
into program memory is detailed in Section 6.5 “Writing
to Flash Program Memory”. Figure 6-2 shows the
operation of a table write with program memory and data
RAM.
Table operations work with byte entities. Tables contain-
ing data, rather than program instructions, are not
required to be word aligned. Therefore, a table can start
and end at any byte address. If a table write is being
used to write executable code into program memory,
program instructions will need to be word aligned.
PIC18F2XK20/4XK20
Table Reads and Table Writes
Table Latch (8-bit)
TABLAT
DS41303G-page 89