PIC18F1320-I/SO Microchip Technology, PIC18F1320-I/SO Datasheet - Page 149

• Manufacturer Part Number: PIC18F1320-I/SO
• Description: IC MCU FLASH 4KX16 A/D 18SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F1320-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 8KB (4K x 16)
• Package / Case: 18-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 16
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163014, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 7-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA12XP080 - ADAPTER DEVICE FOR MPLAB-ICEAC164010 - MODULE SKT PROMATEII DIP/SOIC
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

16.3.6.2
To receive a Break Sync:
1.
2.
3.
4.
5.
6.
FIGURE 16-9:
 2004 Microchip Technology Inc.
Write to TXREG
Configure the EUSART for asynchronous
transmit and receive. TXEN should remain
clear. SPBRGH:SPBRG may be left as is.
Enable auto-wake-up. Set WUE.
Enable RXIF interrupts. Set RCIE, PEIE, GIE.
The controller may be placed in any power
managed mode.
An RCIF will be generated at the beginning of
the Break signal. When the interrupt is received,
read RCREG to clear RCIF and discard. Allow
the controller to return to PRI_RUN mode.
Wait for the RX line to go high at the end of the
Break signal. Wait for any of the following: WUE
to clear automatically (poll), RB4/RX to go high
(poll) or for RBIF to be set (poll or interrupt). If
RBIF is used, check to be sure that RB4/RX is
high before continuing.
BRG Output
(Shift Clock)
TRMT bit
TX (pin)
TXIF bit
SENDB
Receiving a Break Sync
SEND BREAK CHARACTER SEQUENCE
Dummy Write
Start Bit
Bit 0
Bit 1
Break
7.
8.
9.
10. Process subsequent RCIF interrupts normally
Enable Auto-Baud Rate Detect. Set ABDEN.
Return from the interrupt. Allow the primary
clock to start and stabilize (PRI_RUN or
PRI_IDLE).
When the next RCIF interrupt occurs, the
received baud rate has been measured. Read
RCREG to clear RCIF and discard. Check
SPBRGH:SPBRG for a valid value. The
EUSART is ready for normal communications.
Return from the interrupt. Allow the primary
clock to run (PRI_RUN or PRI_IDLE).
as in asynchronous reception. TXEN should
now be set if transmissions are needed. TXIF
and TXIE may be set if transmit interrupts are
desired. Remain in PRI_RUN or PRI_IDLE until
communications are complete. Clear TXEN and
return to step 2.
PIC18F1220/1320
Bit 11
Stop Bit
DS39605C-page 147