PIC18F1320-I/SO Microchip Technology, PIC18F1320-I/SO Datasheet - Page 164

• Manufacturer Part Number: PIC18F1320-I/SO
• Description: IC MCU FLASH 4KX16 A/D 18SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F1320-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 8KB (4K x 16)
• Package / Case: 18-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 16
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163014, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 7-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA12XP080 - ADAPTER DEVICE FOR MPLAB-ICEAC164010 - MODULE SKT PROMATEII DIP/SOIC
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F1220/1320
17.5
The selection of the automatic acquisition time and the
A/D conversion clock is determined, in part, by the low-
power mode clock source and frequency while in a
low-power mode.
If the A/D is expected to operate while the device is
in a low-power mode, the ACQT2:ACQT0 and
ADCS2:ADCS0 bits in ADCON2 should be updated in
accordance with the low-power mode clock that will be
used. After the low-power mode is entered (either of
the Run modes), an A/D acquisition or conversion may
be started. Once an acquisition or conversion is
started, the device should continue to be clocked by the
same low-power mode clock source until the conver-
sion has been completed. If desired, the device may be
placed into the corresponding low-power (ANY)_IDLE
mode during the conversion.
If the low-power mode clock frequency is less than
1 MHz, the A/D RC clock source should be selected.
Operation in the Low-Power Sleep mode requires the
A/D RC clock to be selected. If bits, ACQT2:ACQT0, are
set to ‘000’ and a conversion is started, the conversion
will be delayed one instruction cycle to allow execution
of the SLEEP instruction and entry to Low-Power Sleep
mode. The IDLEN and SCS bits in the OSCCON register
must have already been cleared prior to starting the
conversion.
DS39605C-page 162
Operation in Low-Power Modes
17.6
The ADCON1, TRISA and TRISB registers all configure
the A/D port pins. The port pins needed as analog inputs
must have their corresponding TRIS bits set (input). If
the TRIS bit is cleared (output), the digital output level
(V
The A/D operation is independent of the state of the
CHS2:CHS0 bits and the TRIS bits.
OH
Note 1: When reading the Port register, all pins
or V
2: Analog levels on any pin defined as a
Configuring Analog Port Pins
OL
) will be converted.
configured as analog input channels will
read as cleared (a low level). Pins con-
figured as digital inputs will convert an
analog input. Analog levels on a digitally
configured
converted.
digital input may cause the digital input
buffer to consume current out of the
device’s specification limits.
 2004 Microchip Technology Inc.
input
will
be
accurately