PIC18F1320-I/SO Microchip Technology, PIC18F1320-I/SO Datasheet - Page 165

• Manufacturer Part Number: PIC18F1320-I/SO
• Description: IC MCU FLASH 4KX16 A/D 18SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F1320-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 8KB (4K x 16)
• Package / Case: 18-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 16
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163014, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 7-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA12XP080 - ADAPTER DEVICE FOR MPLAB-ICEAC164010 - MODULE SKT PROMATEII DIP/SOIC
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

17.7
Figure 17-3 shows the operation of the A/D converter
after the GO bit has been set and the ACQT2:ACQT0
bits are cleared. A conversion is started after the follow-
ing instruction to allow entry into Low-Power Sleep
mode before the conversion begins.
Figure 17-4 shows the operation of the A/D converter
after the GO bit has been set and the ACQT2:ACQT0
bits are set to ‘010’ and selecting a 4 T
time before the conversion starts.
FIGURE 17-3:
FIGURE 17-4:
 2004 Microchip Technology Inc.
(Holding capacitor continues
acquiring input)
Set GO bit
1
T
Set GO bit
CY
A/D Conversions
Holding capacitor is disconnected from analog input (typically 100 ns)
T
– T
ACQT
Acquisition
Automatic
2
AD
Time
Conversion Starts
Cycles
T
AD
3
1 T
A/D CONVERSION T
A/D CONVERSION T
AD
b9
4
2 T
Conversion Starts
(Holding capacitor is disconnected)
AD
b8
1
3 T
AD
b9
AD
b7
2
Next Q4: ADRESH:ADRESL is loaded, GO bit is cleared,
Next Q4: ADRESH/ADRESL is loaded, GO bit is cleared,
4 T
acquisition
AD
AD
AD
b8
3
b6
5 T
CYCLES (A
CYCLES (A
ADIF bit is set, holding capacitor is reconnected to analog input.
ADIF bit is set, holding capacitor is connected to analog input.
AD
b5
b7
4
6 T
AD
T
b4
5
b6
AD
7 T
Clearing the GO/DONE bit during a conversion will
abort the current conversion. The A/D Result register
pair will NOT be updated with the partially completed
A/D
ADRESH:ADRESL registers will continue to contain
the value of the last completed conversion (or the last
value written to the ADRESH:ADRESL registers).
After the A/D conversion is completed or aborted, a
2 T
be started. After this wait, acquisition on the selected
channel is automatically started.
CQT
Cycles
CQT
Note:
AD
AD
b3
b5
6
<2:0> = 000, T
8
<2:0> = 010, T
wait is required before the next acquisition can
conversion
T
PIC18F1220/1320
AD
b4
b2
7
The GO/DONE bit should NOT be set in
the same instruction that turns on the A/D.
9 T
AD
b3
b1
8
10
ACQ
T
sample.
AD
ACQ
b0
b2
9
11
= 0)
= 4 T
10
b1
This
AD
DS39605C-page 163
)
b0
11
means
the