PIC18F1320-I/SO Microchip Technology, PIC18F1320-I/SO Datasheet - Page 191

IC MCU FLASH 4KX16 A/D 18SOIC

PIC18F1320-I/SO

Manufacturer Part Number
PIC18F1320-I/SO
Description
IC MCU FLASH 4KX16 A/D 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F1320-I/SO

Program Memory Type
FLASH
Program Memory Size
8KB (4K x 16)
Package / Case
18-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
16
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
16
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163014, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
7-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA12XP080 - ADAPTER DEVICE FOR MPLAB-ICEAC164010 - MODULE SKT PROMATEII DIP/SOIC
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F1320-I/SO
Manufacturer:
MICROCHIP
Quantity:
35 000
Part Number:
PIC18F1320-I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
19.9
The LVP bit in configuration register, CONFIG4L,
enables Low-Voltage Programming (LVP). When LVP
is enabled, the microcontroller can be programmed
without requiring high voltage being applied to the
MCLR/V
dedicated to controlling Program mode entry and is not
available as a general purpose I/O pin.
LVP is enabled in erased devices.
While programming using LVP, V
MCLR/V
enter Programming mode, V
pin.
 2004 Microchip Technology Inc.
Note 1: High-voltage programming is always
PP
PP
2: When
3: When LVP is enabled, externally pull the
Low-Voltage ICSP Programming
/RA5 pin, but the RB5/PGM/KBI1 pin is then
/RA5 pin as in normal execution mode. To
available, regardless of the state of the
LVP bit or the PGM pin, by applying V
to the MCLR pin.
enabled, the RB5 pin can no longer be
used as a general purpose I/O pin.
PGM pin to V
execution.
Low-Voltage
SS
DD
to allow normal program
is applied to the PGM
DD
Programming
is applied to the
IHH
is
If Low-Voltage Programming mode will not be used, the
LVP bit can be cleared and RB5/PGM/KBI1 becomes
available as the digital I/O pin RB5. The LVP bit may be
set or cleared only when using standard high-voltage
programming (V
Once LVP has been disabled, only the standard high-
voltage programming is available and must be used to
program the device.
Memory that is not code-protected can be erased,
using either a Block Erase, or erased row by row, then
written at any specified V
is to be erased, a Block Erase is required. If a Block
Erase is to be performed when using Low-Voltage
Programming, the device must be supplied with V
4.5V to 5.5V.
PIC18F1220/1320
IHH
applied to the MCLR/V
DD
. If code-protected memory
DS39605C-page 189
PP
/RA5 pin).
DD
of

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