PIC18F1320-I/SO Microchip Technology, PIC18F1320-I/SO Datasheet - Page 195

• Manufacturer Part Number: PIC18F1320-I/SO
• Description: IC MCU FLASH 4KX16 A/D 18SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F1320-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 8KB (4K x 16)
• Package / Case: 18-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 16
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163014, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 7-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA12XP080 - ADAPTER DEVICE FOR MPLAB-ICEAC164010 - MODULE SKT PROMATEII DIP/SOIC
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

FIGURE 20-1:
 2004 Microchip Technology Inc.
Byte-oriented file register operations
Byte to Byte move operations (2-word)
Bit-oriented file register operations
Literal operations
Control operations
CALL, GOTO and Branch operations
15
15
15
15
15
15
15
15
15
15
15
OPCODE
OPCODE
OPCODE b (BIT #) a
OPCODE
GENERAL FORMAT FOR INSTRUCTIONS
k = 8-bit immediate value
n = 20-bit immediate value
1111
a =
f = 8-bit file register address
d =
d =
a =
a =
f = 12-bit file register address
b = 3-bit position of bit in file register (f)
a =
f = 8-bit file register address
OPCODE
1111
OPCODE
OPCODE
0
1
0
1
0
1
12 11
12 11
12 11
OPCODE
to force Access Bank
for BSR to select bank
for result destination to be WREG register
for result destination to be file register (f)
to force Access Bank
for BSR to select bank
S = Fast bit
10
12 11
12 11
11 10
d
9
9 8 7
8
8 7
f (Destination FILE #)
n<10:0> (literal)
a
f (Source FILE #)
8 7
n<19:8> (literal)
8 7
7
8 7
S
n<7:0> (literal)
n<19:8> (literal)
f (FILE #)
n<7:0> (literal)
k (literal)
n<7:0> (literal)
f (FILE #)
0
0
0
0
0
0
0
0
0
0
0
PIC18F1220/1320
MOVFF MYREG1, MYREG2
MOVLW 0x7F
BSF MYREG, bit, B
BRA MYFUNC
BC MYFUNC
GOTO Label
CALL MYFUNC
ADDWF MYREG, W, B
Example Instruction
DS39605C-page 193