PIC24FJ64GA006-I/PT Microchip Technology, PIC24FJ64GA006-I/PT Datasheet - Page 113

IC PIC MCU FLASH 32KX16 64TQFP

PIC24FJ64GA006-I/PT

Manufacturer Part Number
PIC24FJ64GA006-I/PT
Description
IC PIC MCU FLASH 32KX16 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Fr

Specifications of PIC24FJ64GA006-I/PT

Program Memory Type
FLASH
Program Memory Size
64KB (22K x 24)
Package / Case
64-TFQFP
Core Processor
PIC
Core Size
16-Bit
Speed
16MHz
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
53
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240011, DV164033, MA240013, AC164127, DM240001
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
Controller Family/series
PIC24
No. Of I/o's
53
Ram Memory Size
8KB
Cpu Speed
32MHz
No. Of Timers
5
Embedded Interface Type
I2C, SPI, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240011 - KIT STARTER MPLAB FOR PIC24F MCUDV164033 - KIT START EXPLORER 16 MPLAB ICD2MA160011 - DAUGHTER BOARD PICDEM LCD 16F91XDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164327 - MODULE SKT FOR 64TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Price
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PIC24FJ64GA006-I/PT
0
12.0
The input capture module has multiple operating
modes which are selected via the ICxCON register.
The operating modes include:
• Capture timer value on every falling edge of input
• Capture timer value on every rising edge of input
FIGURE 12-1:
© 2009 Microchip Technology Inc.
Note:
applied at the ICx pin
applied at the ICx pin
Note: An ‘x’ in a signal, register or bit name denotes the number of the capture channel.
ICx pin
INPUT CAPTURE
This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. Refer to Section 15. “Input Cap-
ture” (DS39701) in the “PIC24F Family
Reference Manual” for more information.
Prescaler
(1, 4, 16)
Counter
3
INPUT CAPTURE BLOCK DIAGRAM
System Bus
ICxCON
ICM<2:0> (ICxCON<2:0>)
ICOV, ICBNE (ICxCON<4:3>)
Mode Select
Edge Detection Logic
Clock Synchronizer
ICI<1:0>
and
PIC24FJ128GA010 FAMILY
(in IFSx Register)
Set Flag ICxIF
Interrupt
Logic
• Capture timer value on every fourth rising edge of
• Capture timer value on every 16th rising edge of
• Capture timer value on every rising and every
• Device wake-up from capture pin during CPU
The input capture module has a four-level FIFO buffer.
The number of capture events required to generate a
CPU interrupt can be selected by the user.
input applied at the ICx pin
input applied at the ICx pin
falling edge of input applied at the ICx pin
Sleep and Idle modes
Logic
FIFO
R/W
From 16-Bit Timers
TMRy
1
ICxBUF
16
0
TMRx
DS39747E-page 113
16
(ICxCON<7>)
ICTMR

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