PIC24FJ64GA006-I/PT Microchip Technology, PIC24FJ64GA006-I/PT Datasheet - Page 234

• Manufacturer Part Number: PIC24FJ64GA006-I/PT
• Description: IC PIC MCU FLASH 32KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ64GA006-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 64KB (22K x 24)
• Package / Case: 64-TFQFP
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: I²C, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC24FJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C/SPI/UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240011, DV164033, MA240013, AC164127, DM240001
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Controller Family/series: PIC24
• No. Of I/o's: 53
• Ram Memory Size: 8KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Embedded Interface Type: I2C, SPI, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM240011 - KIT STARTER MPLAB FOR PIC24F MCUDV164033 - KIT START EXPLORER 16 MPLAB ICD2MA160011 - DAUGHTER BOARD PICDEM LCD 16F91XDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC24FJ128GA010 FAMILY
E
Electrical Characteristics................................................... 211
ENVREG pin ..................................................................... 195
Equations
Errata .................................................................................... 8
F
Flash Configuration Words.......................................... 28, 189
Flash Program Memory....................................................... 47
FSCM
I
I/O Ports ............................................................................ 103
I
Implemented Interrupt Vectors (table)................................. 61
In-Circuit Debugger ........................................................... 197
In-Circuit Serial Programming (ICSP) ............................... 197
Input Capture .................................................................... 113
Input Change Notification.................................................. 104
Instruction Set
Inter-Integrated Circuit (I
Internal RC Oscillator
Internet Address................................................................ 237
Interrupt Control and Status Registers................................ 62
Interrupt Controller .............................................................. 59
Interrupt Setup Procedures ................................................. 91
Interrupt Vector Table (IVT) ................................................ 59
Interrupts Coincident with Power Save Instructions.......... 102
DS39747E-page 234
2
C
Absolute Maximum Ratings ...................................... 211
A/D Conversion Clock Period ................................... 180
Calculating the PWM Period ..................................... 117
Calculation for Maximum PWM Resolution............... 117
Relationship Between Device and SPI Clock Speed ......
UART Baud Rate with BRGH = 0 ............................. 140
UART Baud Rate with BRGH = 1 ............................. 140
Control Registers ........................................................ 48
Enhanced ICSP .......................................................... 48
Operations .................................................................. 48
Programming Algorithm .............................................. 50
RTSP Operation.......................................................... 48
Table Instructions........................................................ 47
and Device Resets ...................................................... 57
Delay for Crystal and PLL Clock Sources ................... 57
Parallel I/O (PIO)....................................................... 103
Write/Read Timing .................................................... 104
Clock Rates............................................................... 133
Communicating as Master in a
Setting Baud Rate When Operating as Bus Master.. 133
Slave Address Masking ............................................ 133
Registers ................................................................... 114
Overview ................................................................... 201
Summary................................................................... 199
Use with WDT ........................................................... 196
IECx ............................................................................ 62
IFSx............................................................................. 62
INTCON1, INTCON2 .................................................. 62
IPCx ............................................................................ 62
Initialization ................................................................. 91
Interrupt Disable.......................................................... 91
Interrupt Service Routine (ISR) ................................... 91
Trap Service Routine (TSR)........................................ 91
Single Master Environment............................... 131
.......................................................................... 130
2
C).............................................. 131
M
Memory Organization ......................................................... 27
Microchip Internet Web Site.............................................. 237
Mode of Operation ............................................................ 115
MPLAB ASM30 Assembler, Linker, Librarian ................... 208
MPLAB Integrated Development Environment Software.. 207
MPLAB PM3 Device Programmer .................................... 210
MPLAB REAL ICE In-Circuit Emulator System ................ 209
MPLINK Object Linker/MPLIB Object Librarian ................ 208
O
Open-Drain Configuration................................................. 104
Oscillator Configuration ...................................................... 93
Output Compare ............................................................... 115
P
Packaging ......................................................................... 225
Pad Configuratiuon Map ..................................................... 39
Parallel Master Port (PMP) ............................................... 147
POR and Long Oscillator Start-up Times ........................... 57
Power-on Reset (POR)
Power-Saving Features .................................................... 101
Power-Saving Modes
Program Address Space..................................................... 27
Program and Data Memory Spaces
Program Memory
Program Space
Program Verification and Code Protection ....................... 197
Programmer’s Model .......................................................... 21
Pulse-Width Modulation Mode.......................................... 117
Clock Switching Mode Configuration Bits ................... 94
Control Registers ........................................................ 95
Details....................................................................... 226
Marking ..................................................................... 225
and On-Chip Voltage Regulator................................ 195
Doze ......................................................................... 102
Instruction-Based...................................................... 101
Memory Map for PIC24FJ128GA010 Family Devices 27
Interfacing ................................................................... 42
Data Access Using Table Instructions ........................ 44
Hard Memory Vectors................................................. 28
Interrupt Vector ........................................................... 28
Organization ............................................................... 28
Reading Data Using Program Space Visibility............ 45
Reset Vector ............................................................... 28
Table Instructions
Address Construction ................................................. 43
Addressing.................................................................. 42
Data Access From, Address Generation .................... 43
Duty Cycle ................................................................ 117
Period ....................................................................... 117
CLKDIV............................................................... 95
OSCCON............................................................ 95
OSCTUN ............................................................ 95
Idle.................................................................... 102
Sleep ................................................................ 101
TBLRDH ............................................................. 44
TBLRDL.............................................................. 44
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