PIC24FJ64GA006-I/PT Microchip Technology, PIC24FJ64GA006-I/PT Datasheet - Page 94

• Manufacturer Part Number: PIC24FJ64GA006-I/PT
• Description: IC PIC MCU FLASH 32KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ64GA006-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 64KB (22K x 24)
• Package / Case: 64-TFQFP
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: I²C, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC24FJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C/SPI/UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240011, DV164033, MA240013, AC164127, DM240001
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Controller Family/series: PIC24
• No. Of I/o's: 53
• Ram Memory Size: 8KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Embedded Interface Type: I2C, SPI, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM240011 - KIT STARTER MPLAB FOR PIC24F MCUDV164033 - KIT START EXPLORER 16 MPLAB ICD2MA160011 - DAUGHTER BOARD PICDEM LCD 16F91XDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC24FJ128GA010 FAMILY
7.1
The system clock source can be provided by one of
four sources:
• Primary Oscillator (POSC) on the OSC1 and
• Secondary Oscillator (SOSC) on the SOSCI and
• Fast Internal RC (FRC) Oscillator
• Low-Power Internal RC (LPRC) Oscillator
The primary oscillator and FRC sources have the
option of using the internal 4x PLL. The frequency of
the FRC clock source can optionally be reduced by the
programmable clock divider. The selected clock source
generates the processor and peripheral clock sources.
The processor clock source is divided by two to pro-
duce the internal instruction cycle clock, F
document, the instruction cycle clock is also denoted
by F
can be provided on the OSC2 I/O pin for some
operating modes of the primary oscillator.
7.2
The oscillator source (and operating mode) that is used
at a device Power-on Reset event is selected using Con-
figuration bit settings. The oscillator Configuration bit
TABLE 7-1:
DS39747E-page 94
Fast RC Oscillator with Postscaler
(FRCDIV)
(Reserved)
Low-Power RC Oscillator (LPRC)
Secondary (Timer1) Oscillator
(SOSC)
Primary Oscillator (HS) with PLL
Module (HSPLL)
Primary Oscillator (XT) with PLL
Module (XTPLL)
Primary Oscillator (EC) with PLL
Module (ECPLL)
Primary Oscillator (HS)
Primary Oscillator (XT)
Primary Oscillator (EC)
Fast RC Oscillator with PLL Module
(FRCPLL)
Fast RC Oscillator (FRC)
Note 1:
OSC2 pins
SOSCO pins
OSC
2:
/2. The internal instruction cycle clock, F
CPU Clocking Scheme
Oscillator Configuration
Oscillator Mode
OSC2 pin function is determined by the OSCIOFNC Configuration bit.
This is the default oscillator mode for an unprogrammed (erased) device.
CONFIGURATION BIT VALUES FOR CLOCK SELECTION
Oscillator Source
CY
Secondary
. In this
Primary
Primary
Primary
Primary
Primary
Primary
Internal
Internal
Internal
Internal
Internal
OSC
/2,
settings are located in the Configuration registers in the
program memory (refer to Section 23.1 “Configura-
tion Bits” for further details.) The Primary Oscillator
Configuration
(Configuration Word 2<1:0>), and the Initial Oscillator
Select
(Configuration Word 2<10:8>), select the oscillator
source that is used at a Power-on Reset. The FRC
primary oscillator with postscaler (FRCDIV) is the
default (unprogrammed) selection. The secondary
oscillator, or one of the internal oscillators, may be
chosen by programming these bit locations.
The Configuration bits allow users to choose between
the various clock modes, shown in Table 7-1.
7.2.1
The FCKSM Configuration bits (Configuration Word 2<7:6>)
are used to jointly configure device clock switching and
the Fail-Safe Clock Monitor (FSCM). Clock switching is
enabled only when FCKSM1 is programmed (‘0’). The
FSCM is enabled only when FCKSM1:FCKSM0 are
both programmed (‘00’).
POSCMD1:
POSCMD0
11
xx
11
11
10
01
00
10
01
00
11
11
Configuration
CLOCK SWITCHING MODE
CONFIGURATION BITS
bits,
© 2009 Microchip Technology Inc.
FNOSC2:
FNOSC0
bits,
111
110
101
100
011
011
011
010
010
010
001
000
POSCMD1:POSCMD0
FNOSC2:FNOSC0
Note
1, 2
1
1
1
1
1