PIC24FJ64GA006-I/PT Microchip Technology, PIC24FJ64GA006-I/PT Datasheet - Page 195

IC PIC MCU FLASH 32KX16 64TQFP

PIC24FJ64GA006-I/PT

Manufacturer Part Number
PIC24FJ64GA006-I/PT
Description
IC PIC MCU FLASH 32KX16 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Fr

Specifications of PIC24FJ64GA006-I/PT

Program Memory Type
FLASH
Program Memory Size
64KB (22K x 24)
Package / Case
64-TFQFP
Core Processor
PIC
Core Size
16-Bit
Speed
16MHz
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
53
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240011, DV164033, MA240013, AC164127, DM240001
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
Controller Family/series
PIC24
No. Of I/o's
53
Ram Memory Size
8KB
Cpu Speed
32MHz
No. Of Timers
5
Embedded Interface Type
I2C, SPI, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240011 - KIT STARTER MPLAB FOR PIC24F MCUDV164033 - KIT START EXPLORER 16 MPLAB ICD2MA160011 - DAUGHTER BOARD PICDEM LCD 16F91XDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164327 - MODULE SKT FOR 64TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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0
23.2
All of the PIC24FJ128GA010 family devices power
their core digital logic at a nominal 2.5V. This may
create an issue for designs that are required to operate
at a higher typical voltage, such as 3.3V. To simplify
system design, all devices in the PIC24FJ128GA010
incorporate an on-chip regulator that allows the device
to run its core logic from V
The regulator is controlled by the ENVREG pin. Tying
V
provides power to the core from the other V
When the regulator is enabled, a low ESR capacitor
(such as tantalum) must be connected to the
V
tain the stability of the regulator. The recommended
value for the filer capacitor, C
Section 26.1 “DC Characteristics”.
If ENVREG is tied to V
this case, separate power for the core logic at a nomi-
nal 2.5V must be supplied to the device on the
V
levels, typically 3.3V. Alternatively, the V
and V
nominal voltage. Refer to Figure 23-1 for possible
configurations.
23.2.1
When the voltage regulator is enabled, it takes approxi-
mately 20 μs for it to generate output. During this time,
designated as T
T
operation after any power-down, including Sleep mode.
If the regulator is disabled, a separate Power-up Timer
(PWRT) is automatically enabled. The PWRT adds a
fixed delay of 64 ms nominal delay at device start-up.
23.2.2
When
PIC24FJ128GA010 devices also have a simple
brown-out capability. If the voltage supplied to the reg-
ulator is inadequate to maintain a regulated level, the
regulator Reset circuitry will generate a Brown-out
Reset. This event is captured by the BOR flag bit
(RCON<0>). The brown-out voltage specifications can
be found in the PIC24F Family Reference Manual
Reset chapter (DS39712).
23.2.3
The on-chip regulator is designed to meet the power-up
requirements for the device. If the application does not
use the regulator, then strict power-up conditions must
be adhered to. While powering up, V
never exceed V
© 2009 Microchip Technology Inc.
STARTUP
DD
DDCORE
DDCORE
to the pin enables the regulator, which in turn,
DD
pins can be tied together to operate at a lower
On-Chip Voltage Regulator
/V
/V
the
is applied every time the device resumes
CAP
CAP
ON-CHIP REGULATOR AND POR
ON-CHIP REGULATOR AND BOR
POWER-UP REQUIREMENTS
DD
pin to run the I/O pins at higher voltage
pin (Figure 23-1). This helps to main-
STARTUP
on-chip
by 0.3 volts.
SS
, code execution is disabled.
, the regulator is disabled. In
DD
regulator
.
EFC
, is provided in
is
DDCORE
DDCORE
enabled,
DD
PIC24FJ128GA010 FAMILY
/V
must
pins.
CAP
FIGURE 23-1:
Note 1:
Regulator Enabled (ENVREG tied to V
Regulator Disabled (ENVREG tied to ground):
Regulator Disabled (V
(10 μF typ)
2.5V
C
2.5V
EFC
(1)
These are typical operating voltages. Refer
to Section 26.1 “DC Characteristics” for
the full operating ranges of V
V
(1)
DDCORE
3.3V
3.3V
.
CONNECTIONS FOR THE
ON-CHIP REGULATOR
(1)
V
ENVREG
V
V
DD
DDCORE
SS
DD
PIC24FJ128GA010
V
ENVREG
V
V
V
ENVREG
V
V
DD
DDCORE
SS
DD
DDCORE
SS
tied to V
PIC24FJ128GA010
PIC24FJ128GA010
/V
CAP
/V
DS39747E-page 195
/V
DDCORE
CAP
CAP
DD
and
DD
):
):

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