IC DSPIC MCU/DSP 128K 100-TQFP

DSPIC33FJ128GP310A-I/PT

Manufacturer Part NumberDSPIC33FJ128GP310A-I/PT
DescriptionIC DSPIC MCU/DSP 128K 100-TQFP
ManufacturerMicrochip Technology
SeriesdsPIC™ 33F
DSPIC33FJ128GP310A-I/PT datasheet
 

Specifications of DSPIC33FJ128GP310A-I/PT

Program Memory TypeFLASHProgram Memory Size128KB (128K x 8)
Package / Case100-TFQFPCore ProcessordsPIC
Core Size16-BitSpeed40 MIPs
ConnectivityI²C, IrDA, LIN, SPI, UART/USARTPeripheralsAC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o85Ram Size16K x 8
Voltage - Supply (vcc/vdd)3 V ~ 3.6 VData ConvertersA/D 32x10b/12b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
ProductDSCsData Bus Width16 bit
Processor SeriesDSPIC33FCoredsPIC
Maximum Clock Frequency40 MHzNumber Of Programmable I/os85
Data Ram Size16 KBMaximum Operating Temperature+ 85 C
Mounting StyleSMD/SMT3rd Party Development Tools52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By SupplierPG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033Minimum Operating Temperature- 40 C
Lead Free Status / RoHS StatusLead free / RoHS CompliantFor Use With876-1001 - DSPIC33 BREAKOUT BOARD
Eeprom Size-  
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TABLE 4-11:
UART1 REGISTER MAP
SFR
SFR Name
Bit 15
Bit 14
Bit 13
Bit 12
Addr
U1MODE
0220
UARTEN
USIDL
IREN
U1STA
0222
UTXISEL1
UTXINV UTXISEL0
U1TXREG
0224
U1RXREG
0226
U1BRG
0228
Legend:
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
TABLE 4-12:
UART2 REGISTER MAP
SFR
SFR
Bit 15
Bit 14
Bit 13
Bit 12
Name
Addr
U2MODE
0230
UARTEN
USIDL
IREN
U2STA
0232
UTXISEL1
UTXINV
UTXISEL0
U2TXREG
0234
U2RXREG
0236
U2BRG
0238
Legend:
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
TABLE 4-13:
SPI1 REGISTER MAP
SFR
SFR
Bit 15
Bit 14
Bit 13
Bit 12
Name
Addr
SPI1STAT
0240
SPIEN
SPISIDL
SPI1CON1
0242
DISSCK
SPI1CON2
0244
FRMEN
SPIFSD
FRMPOL
SPI1BUF
0248
Legend:
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
TABLE 4-14:
SPI2 REGISTER MAP
SFR
SFR Name
Bit 15
Bit 14
Bit 13
Bit 12
Addr
SPI2STAT
0260
SPIEN
SPISIDL
SPI2CON1
0262
DISSCK
SPI2CON2
0264
FRMEN
SPIFSD
FRMPOL
SPI2BUF
0268
Legend:
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
RTSMD
UEN1
UEN0
WAKE
LPBACK
UTXBRK
UTXEN
UTXBF
TRMT
URXISEL<1:0>
Baud Rate Generator Prescaler
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
RTSMD
UEN1
UEN0
WAKE
LPBACK
UTXBRK
UTXEN
UTXBF
TRMT
URXISEL<1:0>
Baud Rate Generator Prescaler
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
SPIROV
DISSDO
MODE16
SMP
CKE
SSEN
CKP
SPI1 Transmit and Receive Buffer Register
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
SPIROV
DISSDO
MODE16
SMP
CKE
SSEN
CKP
SPI2 Transmit and Receive Buffer Register
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
ABAUD
URXINV
BRGH
PDSEL<1:0>
STSEL
ADDEN
RIDLE
PERR
FERR
OERR
URXDA
UART Transmit Register
UART Receive Register
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
ABAUD
URXINV
BRGH
PDSEL<1:0>
STSEL
ADDEN
RIDLE
PERR
FERR
OERR
URXDA
UART Transmit Register
UART Receive Register
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
SPITBF
SPIRBF
MSTEN
SPRE<2:0>
PPRE<1:0>
FRMDLY
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
SPITBF
SPIRBF
MSTEN
SPRE<2:0>
PPRE<1:0>
FRMDLY
All
Resets
0000
0110
xxxx
0000
0000
All
Resets
0000
0110
xxxx
0000
0000
All
Resets
0000
0000
0000
0000
All
Resets
0000
0000
0000
0000