PIC18F452-I/P Microchip Technology, PIC18F452-I/P Datasheet - Page 101

• Manufacturer Part Number: PIC18F452-I/P
• Description: IC MCU FLASH 16KX16 EE 40DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F452-I/P

• Program Memory Type: FLASH
• Program Memory Size: 32KB (16K x 16)
• Package / Case: 40-DIP (0.600", 15.24mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 34
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: MSSP/SPI/I2C/PSP/USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 34
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Package: 40PDIP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 444-1001 - DEMO BOARD FOR PICMICRO MCUACICE0206 - ADAPTER MPLABICE 40P 600 MIL
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: PIC18F452I/P; Q1176145

TABLE 9-9:
TABLE 9-10:
PORTE
LATE
TRISE
ADCON1
Legend: x = unknown, u = unchanged, - = unimplemented, read as '0'. Shaded cells are not used by PORTE.
Legend: ST = Schmitt Trigger input, TTL = TTL input
2002 Microchip Technology Inc.
RE1/WR/AN6
Name
RE0/RD/AN5
RE2/CS/AN7
Note 1: Input buffers are Schmitt Triggers when in I/O mode and TTL buffers when in Parallel Slave Port mode.
Name
ADFM
Bit 7
IBF
—
—
SUMMARY OF REGISTERS ASSOCIATED WITH PORTE
PORTE FUNCTIONS
ADCS2
Bit 6
OBF
Bit#
bit0
bit1
bit2
—
—
IBOV
Bit 5
Buffer Type
—
—
—
ST/TTL
ST/TTL
ST/TTL
PSPMODE
(1)
(1)
(1)
Bit 4
—
—
—
Input/output port pin or read control input in Parallel Slave Port mode
or analog input:
RD
1 = Not a read operation
0 = Read operation. Reads PORTD register (if chip selected).
Input/output port pin or write control input in Parallel Slave Port mode
or analog input:
WR
1 = Not a write operation
0 = Write operation. Writes PORTD register (if chip selected).
Input/output port pin or chip select control input in Parallel Slave Port
mode or analog input:
CS
1 = Device is not selected
0 = Device is selected
PCFG3
Bit 3
—
—
—
LATE Data Output Register
PORTE Data Direction bits
PCFG2
Bit 2
RE2
PCFG1
Bit 1
RE1
Function
PCFG0
Bit 0
RE0
PIC18FXX2
---- -000
---- -xxx
0000 -111
00-- 0000
POR, BOR
Value on
DS39564B-page 99
---- -000
---- -uuu
0000 -111
00-- 0000
All Other
Value on
RESETS