PIC18F452-I/P Microchip Technology, PIC18F452-I/P Datasheet - Page 322

• Manufacturer Part Number: PIC18F452-I/P
• Description: IC MCU FLASH 16KX16 EE 40DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F452-I/P

• Program Memory Type: FLASH
• Program Memory Size: 32KB (16K x 16)
• Package / Case: 40-DIP (0.600", 15.24mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 34
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: MSSP/SPI/I2C/PSP/USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 34
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Package: 40PDIP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 444-1001 - DEMO BOARD FOR PICMICRO MCUACICE0206 - ADAPTER MPLABICE 40P 600 MIL
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: PIC18F452I/P; Q1176145

PIC18FXX2
Instructions in Program Memory ........................................ 40
INT Interrupt (RB0/INT). See Interrupt Sources
INTCON Register
INTCON Registers ....................................................... 75–77
Inter-Integrated Circuit. See I
Interrupt Sources .............................................................. 195
Interrupts ............................................................................ 73
Interrupts, Enable Bits
Interrupts, Flag Bits
IORLW ............................................................................. 234
IORWF ............................................................................. 234
IPR Registers ............................................................... 82–83
K
K
L
LFSR ................................................................................ 235
Lookup Tables
Low Voltage Detect .......................................................... 189
LVD. See Low Voltage Detect. ......................................... 189
DS39564B-page 320
EE
L
TBLRD ..................................................................... 249
TBLWT ..................................................................... 250
TSTFSZ .................................................................... 251
XORLW .................................................................... 251
XORWF .................................................................... 252
Summary Table ........................................................ 214
Two-Word Instructions ............................................... 41
RBIF Bit ...................................................................... 90
A/D Conversion Complete ........................................ 184
Capture Complete (CCP) ......................................... 119
Compare Complete (CCP) ....................................... 120
INT0 ........................................................................... 85
Interrupt-on-Change (RB7:RB4 ) ............................... 90
PORTB, Interrupt-on-Change .................................... 85
RB0/INT Pin, External ................................................ 85
TMR0 ......................................................................... 85
TMR0 Overflow ........................................................ 105
TMR1 Overflow ................................................ 107, 109
TMR2 to PR2 Match ................................................. 112
TMR2 to PR2 Match (PWM) ............................ 111, 122
TMR3 Overflow ................................................ 113, 115
USART Receive/Transmit Complete ........................ 165
Logic ........................................................................... 74
CCP1 Enable (CCP1IE Bit) ...................................... 119
A/D Converter Flag (ADIF Bit) .................................. 183
CCP1 Flag (CCP1IF Bit) .......................................... 119
CCP1IF Flag (CCP1IF Bit) ....................................... 120
Interrupt-on-Change (RB7:RB4) Flag
Computed GOTO ....................................................... 41
Table Reads, Table Writes ......................................... 41
Converter Characteristics ......................................... 267
Effects of a RESET .................................................. 193
Operation ................................................................. 192
Typical Application ................................................... 189
OQ
Evaluation and Programming Tools ................... 256
(RBIF Bit) ........................................................... 90
Current Consumption ....................................... 193
During SLEEP .................................................. 193
Reference Voltage Set Point ............................ 193
2
C
M
Master SSP (MSSP) Module Overview ........................... 125
Master Synchronous Serial Port (MSSP). See MSSP.
Master Synchronous Serial Port. See MSSP
Memory Organization
Memory Programming Requirements .............................. 268
Migration from Baseline to Enhanced Devices ................ 314
Migration from High-End to Enhanced Devices ............... 315
Migration from Mid-Range to Enhanced Devices ............ 315
MOVF .............................................................................. 235
MOVFF ............................................................................ 236
MOVLB ............................................................................ 236
MOVLW ........................................................................... 237
MOVWF ........................................................................... 237
MPLAB C17 and MPLAB C18 C Compilers ..................... 253
MPLAB ICD In-Circuit Debugger ..................................... 255
MPLAB ICE High Performance Universal In-Circuit
MPLAB Integrated Development
MPLINK Object Linker/MPLIB Object Librarian ............... 254
MSSP ............................................................................... 125
MSSP Module
MULLW ............................................................................ 238
MULWF ............................................................................ 238
N
NEGF ............................................................................... 239
NOP ................................................................................. 239
O
Opcode Field Descriptions ............................................... 212
OPTION_REG Register
Oscillator Configuration ...................................................... 17
Oscillator Selection .......................................................... 195
Oscillator, Timer1 ..............................................107, 109, 115
Oscillator, Timer3 ............................................................. 113
Oscillator, WDT ................................................................ 203
Data Memory ............................................................. 42
Program Memory ....................................................... 35
Emulator with MPLAB IDE ....................................... 254
Environment Software ............................................. 253
Control Registers (general) ...................................... 125
Enabling SPI I/O ...................................................... 129
Operation ................................................................. 128
Typical Connection .................................................. 129
SPI Master Mode ..................................................... 130
SPI Master./Slave Connection ................................. 129
SPI Slave Mode ....................................................... 131
PSA Bit .................................................................... 105
T0CS Bit .................................................................. 105
T0PS2:T0PS0 Bits ................................................... 105
T0SE Bit ................................................................... 105
EC .............................................................................. 17
ECIO .......................................................................... 17
HS .............................................................................. 17
HS + PLL ................................................................... 17
LP .............................................................................. 17
RC .............................................................................. 17
RCIO .......................................................................... 17
XT .............................................................................. 17
2002 Microchip Technology Inc.