PIC18F452-I/P Microchip Technology, PIC18F452-I/P Datasheet - Page 31

IC MCU FLASH 16KX16 EE 40DIP

PIC18F452-I/P

Manufacturer Part Number
PIC18F452-I/P
Description
IC MCU FLASH 16KX16 EE 40DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F452-I/P

Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
40-DIP (0.600", 15.24mm)
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
34
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
MSSP/SPI/I2C/PSP/USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
34
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163022
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Package
40PDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
444-1001 - DEMO BOARD FOR PICMICRO MCUACICE0206 - ADAPTER MPLABICE 40P 600 MIL
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
PIC18F452I/P
Q1176145

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TABLE 3-3:
FSR1H
FSR1L
BSR
INDF2
POSTINC2
POSTDEC2
PREINC2
PLUSW2
FSR2H
FSR2L
STATUS
TMR0H
TMR0L
T0CON
OSCCON
LVDCON
WDTCON
RCON
TMR1H
TMR1L
T1CON
TMR2
PR2
T2CON
SSPBUF
SSPADD
SSPSTAT
SSPCON1
SSPCON2
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ’0’, q = value depends on condition.
Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
2002 Microchip Technology Inc.
Register
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
4: See Table 3-2 for RESET value for specific condition.
5: Bit 6 of PORTA, LATA, and TRISA are enabled in ECIO and RCIO Oscillator modes only. In all other
6: Bit 6 of PORTA, LATA and TRISA are not available on all devices. When unimplemented, they are read ’0’.
(4)
Shaded cells indicate conditions do not apply for the designated device.
vector (0008h or 0018h).
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
Oscillator modes, they are disabled and read ’0’.
242
242
242
242
242
242
242
242
242
242
242
242
242
242
242
242
242
242
242
242
242
242
242
242
242
242
242
242
242
Applicable Devices
INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
452
452
452
452
452
452
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452
452
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452
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452
452
452
Brown-out Reset
Power-on Reset,
---- xxxx
xxxx xxxx
---- 0000
---- xxxx
xxxx xxxx
---x xxxx
0000 0000
xxxx xxxx
1111 1111
---- ---0
--00 0101
---- ---0
0--q 11qq
xxxx xxxx
xxxx xxxx
0-00 0000
0000 0000
1111 1111
-000 0000
xxxx xxxx
0000 0000
0000 0000
0000 0000
0000 0000
N/A
N/A
N/A
N/A
N/A
RESET Instruction
MCLR Resets
Stack Resets
---- uuuu
uuuu uuuu
---- 0000
---- uuuu
uuuu uuuu
---u uuuu
uuuu uuuu
uuuu uuuu
1111 1111
---- ---0
--00 0101
---- ---0
0--q qquu
uuuu uuuu
uuuu uuuu
u-uu uuuu
0000 0000
1111 1111
-000 0000
uuuu uuuu
0000 0000
0000 0000
0000 0000
0000 0000
WDT Reset
N/A
N/A
N/A
N/A
N/A
PIC18FXX2
Wake-up via WDT
or Interrupt
---- uuuu
uuuu uuuu
---- uuuu
---- uuuu
uuuu uuuu
---u uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
---- ---u
--uu uuuu
---- ---u
u--u qquu
uuuu uuuu
uuuu uuuu
u-uu uuuu
uuuu uuuu
1111 1111
-uuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
DS39564B-page 29
N/A
N/A
N/A
N/A
N/A

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