PIC18F452-I/P Microchip Technology, PIC18F452-I/P Datasheet - Page 113

IC MCU FLASH 16KX16 EE 40DIP

PIC18F452-I/P

Manufacturer Part Number
PIC18F452-I/P
Description
IC MCU FLASH 16KX16 EE 40DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F452-I/P

Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
40-DIP (0.600", 15.24mm)
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
34
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
MSSP/SPI/I2C/PSP/USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
34
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163022
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Package
40PDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
444-1001 - DEMO BOARD FOR PICMICRO MCUACICE0206 - ADAPTER MPLABICE 40P 600 MIL
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
PIC18F452I/P
Q1176145

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12.0
The Timer2 module timer has the following features:
• 8-bit timer (TMR2 register)
• 8-bit period register (PR2)
• Readable and writable (both registers)
• Software programmable prescaler (1:1, 1:4, 1:16)
• Software programmable postscaler (1:1 to 1:16)
• Interrupt on TMR2 match of PR2
• SSP module optional use of TMR2 output to
Timer2 has a control register shown in Register 12-1.
Timer2 can be shut-off by clearing control bit TMR2ON
(T2CON<2>)
Figure 12-1 is a simplified block diagram of the Timer2
module. Register 12-1 shows the Timer2 control regis-
ter. The prescaler and postscaler selection of Timer2
are controlled by this register.
REGISTER 12-1:
generate clock shift
2002 Microchip Technology Inc.
TIMER2 MODULE
bit 7
bit 6-3
bit 2
bit 1-0
to
minimize
bit 7
Unimplemented: Read as '0'
TOUTPS3:TOUTPS0: Timer2 Output Postscale Select bits
0000 = 1:1 Postscale
0001 = 1:2 Postscale
1111 = 1:16 Postscale
TMR2ON: Timer2 On bit
1 = Timer2 is on
0 = Timer2 is off
T2CKPS1:T2CKPS0: Timer2 Clock Prescale Select bits
00 = Prescaler is 1
01 = Prescaler is 4
1x = Prescaler is 16
T2CON: TIMER2 CONTROL REGISTER
Legend:
R = Readable bit
- n = Value at POR
U-0
power
TOUTPS3
R/W-0
consumption.
TOUTPS2
R/W-0
W = Writable bit
’1’ = Bit is set
TOUTPS1
R/W-0
12.1
Timer2 can be used as the PWM time-base for the
PWM mode of the CCP module. The TMR2 register is
readable and writable, and is cleared on any device
RESET. The input clock (F
of 1:1, 1:4 or 1:16, selected by control bits
T2CKPS1:T2CKPS0 (T2CON<1:0>). The match out-
put of TMR2 goes through a 4-bit postscaler (which
gives a 1:1 to 1:16 scaling inclusive) to generate a
TMR2 interrupt (latched in flag bit TMR2IF, (PIR1<1>)).
The prescaler and postscaler counters are cleared
when any of the following occurs:
• a write to the TMR2 register
• a write to the T2CON register
• any device RESET (Power-on Reset, MCLR
TMR2 is not cleared when T2CON is written.
Reset, Watchdog Timer Reset, or Brown-out
Reset)
TOUTPS0 TMR2ON T2CKPS1 T2CKPS0
Timer2 Operation
R/W-0
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
R/W-0
PIC18FXX2
OSC
/4) has a prescale option
x = Bit is unknown
R/W-0
DS39564B-page 111
R/W-0
bit 0

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