PIC18F452-I/P Microchip Technology, PIC18F452-I/P Datasheet - Page 175

• Manufacturer Part Number: PIC18F452-I/P
• Description: IC MCU FLASH 16KX16 EE 40DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F452-I/P

• Program Memory Type: FLASH
• Program Memory Size: 32KB (16K x 16)
• Package / Case: 40-DIP (0.600", 15.24mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 34
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: MSSP/SPI/I2C/PSP/USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 34
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Package: 40PDIP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 444-1001 - DEMO BOARD FOR PICMICRO MCUACICE0206 - ADAPTER MPLABICE 40P 600 MIL
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: PIC18F452I/P; Q1176145

FIGURE 16-2:
FIGURE 16-3:
TABLE 16-6:
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE
PIR1
PIE1
IPR1
RCSTA
TXREG USART Transmit Register
TXSTA
SPBRG Baud Rate Generator Register
Legend: x = unknown, - = unimplemented locations read as '0'.
Note 1: The PSPIF, PSPIE and PSPIP bits are reserved on the PIC18F2X2 devices; always maintain these bits clear.
Name
TXIF bit
(Interrupt Reg. Flag)
2002 Microchip Technology Inc.
TRMT bit
(Transmit Shift
Reg. Empty Flag)
Note:
Reg. Empty Flag)
(Transmit Shift
Reg. Empty Flag)
RC6/TX/CK (pin)
RC6/TX/CK (pin)
Write to TXREG
Write to TXREG
(Transmit Buffer
BRG Output
(Shift Clock)
BRG Output
(Shift Clock)
Shaded cells are not used for Asynchronous Transmission.
TRMT bit
This timing diagram shows two consecutive transmissions.
PSPIE
PSPIP
PSPIF
TXIF bit
CSRC
SPEN
Bit 7
REGISTERS ASSOCIATED WITH ASYNCHRONOUS TRANSMISSION
(1)
(1)
(1)
ASYNCHRONOUS TRANSMISSION
ASYNCHRONOUS TRANSMISSION (BACK TO BACK)
ADIF
ADIE
ADIP
Bit 6
RX9
TX9
Transmit Shift Reg.
Word 1
Word 1
Transmit Shift Reg
Word 1
Word 1
SREN
TXEN
RCIF
RCIE
RCIP
Bit 5
START bit
START bit
Word 2
CREN ADDEN
SYNC
TXIE
TXIP
Bit 4
TXIF
bit 0
bit 0
SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
SSPIP CCP1IP TMR2IP TMR1IP 0000 0000 0000 0000
SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000
RBIE
Bit 3
—
bit 1
Word 1
bit 1
TMR0IF INT0IF
BRGH
FERR
Word 1
Bit 2
OERR
TRMT
Bit 1
bit 7/8
Word 2
Transmit Shift Reg.
RX9D
TX9D
RBIF
bit 7/8
Bit 0
STOP bit
PIC18FXX2
STOP bit
0000 000x 0000 000u
0000 -00x 0000 -00x
0000 0000 0000 0000
0000 -010 0000 -010
0000 0000 0000 0000
POR, BOR
Value on
START bit
DS39564B-page 173
Word 2
All Other
Value on
RESETS
bit 0