MB95F118JWPMC-GE1 Fujitsu Semiconductor America Inc, MB95F118JWPMC-GE1 Datasheet - Page 26

• Manufacturer Part Number: MB95F118JWPMC-GE1
• Description: IC MCU 60K FLASH 2KB RAM 52LQFP
• Manufacturer: Fujitsu Semiconductor America Inc
• Series: F²MC MB95110Mr

Specifications of MB95F118JWPMC-GE1

• Core Processor: F²MC-8FX
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SIO, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Data Converters: A/D 8x8/10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: 865-1071

26
MB95110M Series
Address
006B
006C
006D
006E
007A
007B
007C
007D
007E
0060
0061
0062
0063
0064
0065
0066
006F
0070
0071
0072
0073
0074
0075
0076
0077
0078
0079
007F
0F80
0F81
0F82
0F83
0F84
0F85
to
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
abbreviation
WRARH0
WRARH1
WRARL0
WRARL1
Register
WRDR0
WRDR1
IBCR00
IBCR10
SWRE0
SWRE1
WROR
IDDR0
ICCR0
WCSR
WREN
IBSR0
IAAR0
ADDH
ADC1
ADC2
ADDL
ILR0
ILR1
ILR2
ILR3
ILR4
ILR5
FSR
⎯
⎯
⎯
⎯
⎯
Wild register address setting register (Upper byte) ch.0
Wild register address setting register (Lower byte) ch.0
Wild register address setting register (Upper byte) ch.1
Wild register address setting register (Lower byte) ch.1
(Mirror of register bank pointer (RP) and direct bank
pointer (DP) )
8/10-bit A/D converter data register (Upper byte)
8/10-bit A/D converter data register (Lower byte)
Wild register address compare enable register
Flash memory sector writing control register 0
Flash memory sector writing control register 1
8/10-bit A/D converter control register 1
8/10-bit A/D converter control register 2
Wild register data setting register ch.0
Wild register data setting register ch.1
Wild register data test setting register
Interrupt level setting register 0
Interrupt level setting register 1
Interrupt level setting register 2
Interrupt level setting register 3
Interrupt level setting register 4
Interrupt level setting register 5
I
I
Watch counter status register
I
Flash memory status register
2
2
2
I
C bus control register 0 ch.0
C bus control register 1 ch.0
C clock control register ch.0
2
I
C bus status register ch.0
2
C address register ch.0
I
2
C data register ch.0
Register name
(Disabled)
(Disabled)
(Disabled)
(Disabled)
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
⎯
⎯
⎯
⎯
⎯
R
Initial value
000X0000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
11111111
11111111
11111111
11111111
11111111
11111111
00000000
00000000
00000000
00000000
00000000
00000000
(Continued)
⎯
⎯
⎯
⎯
⎯
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B